Chapter 18 Fundamentals of Packaging Materials and Processes

1. Chapter 18Fundamentals of Packaging Materials and Processes Jason Mucilli Vincent Wu

2. 18.1 Role of Materials in Microsystems Packaging Materials provide several functions in microelectronic packaging. It transmit signals from IC to IC, supply power to ICs, provide interconnections to form the system-level hierarchy, mechanically and environmentally protect Ics, and dissipate heat.

3. 18.1 Role of Materials in Microsystems Packaging cont.

4. 18.1 Role of Materials in Microsystems Packaging cont. Integrated Circuit Packaging Packaging of an integrated circuit (IC) provides electrical connections to the rest of the components by means of a systems-level board. Ceramics provides thermo-mechanical reliability Polymers perform better electrically than ceramics because of the low dielectric constant, except for applications where ultra-low loss is required.

6. 18.1 Role of Materials in Microsystems Packaging cont. IC Assembly The electrical interconnections between the chip and package are provided by metal wirebonding techniques. The conducting wire should have a high electrical conductivity, oxidation resistance, and good wetting to the bonding pads and mechanical properties to withstand creep and fatigue. Wirebonding needs any two of the three conditions that assist joining: heat, compression or ultrasonic vibration.

7. 18.1 Role of Materials in Microsystems Packaging cont. System – Level Packaging System-level packaging provides wiring that forms an electrical interconnection for all components within the system. The organic substrate that provides these functions is called a printed wiring board (PWB).

8. 18.1 Role of Materials in Microsystems Packaging cont. System – Level Packaging cont. Surface mount technology (SMT) interconnections are achieved by soldering, with the most common soldering compound being an eutectic Pb-Sn alloy with a melting point of 183C. A huge coefficient of thermal expansion (CTE) mismatch between the PWB and IC induces significant stresses that cause failure at the solder joints.

9. 18.2 Packaging materials and properties The properties relevant to packaging are electrical and thermal conductivity, coefficient of thermal expansion, electrical permittivity, polymer glass transition temperature and Young’s modulus. These properties are determined by the lattice or molecular structure, the atoms that constitute the lattice and their interactions, and the extrinsic effects such as impurities. No single material has the required combination of properties.

10. 18.2 Packaging materials and properties Conductivity Electric field is applied onto a conductor, the electrons drift towards the positive potential, resulting in a current. Electrical conductivity is the ratio of current density and the applied electric field Most covalent and ionic solids are insulators, whereas metals are good conductors. Semiconductors form an intermediate group between these two.

11. 18.2 Packaging materials and properties cont. Electrical conductivity is limited by the collisions between ‘‘electrons’’ and ‘‘imperfections’’ in the lattice of the conductor. These collisions will cause the electrons to lose their energy and momentum. Joule heating manifests as an electrical resistance The resistance in almost all metals increases with temperature.

12. 18.2 Packaging materials and properties cont. Thermal Conductivity The amount of heat transferred through a material per unit of time, denoted as heat flux Q, is proportional to the temperature gradient (dT/dx). The Ratio of heat flux and temperature gradient is called thermal conductivity.

13. 18.2 Packaging materials and properties cont. Coefficient of Thermal Expansion Dimensional change that occurs during heating or cooling of a material is characterized by its coefficient of thermal expansion (CTE).

14. 18.2 Packaging materials and properties cont. Glass Transition Temperature It is characterizes the transition of an amorphous material from a brittle state to a rubbery state. Glass transition is manifested by drastic changes in many of material’s physical properties such as volume and modulus. Glass transition temp. is characterized from thermochemical analysis (TMA) and dynamic mechanical analysis (DMA).

15. 18.2 Packaging materials and properties cont. Glass transition temp. phenomena in polymers.

16. 18.2 Packaging materials and properties cont. Mechanical Properties Materials in electronic system packages are always subjected to large forces Forces may be caused by flexure and impact during fabrication or actual use, or from the internal thermal gradients and differential expansion properties at the interface with other materials.

17. 18.2 Packaging materials and properties cont. Young’s Modulus Materials deform in response to an applied force. Deformation may be permanent or temporary, time dependent or time independent, and is classified accordingly. Force deformation relationships are expressed in terms of stresses and strains.

18. 18.2 Packaging materials and properties cont.

19. 18.2 Packaging materials and properties cont. Surface Tension and Wetting All materials in the solid or liquid state have energy associated with their surfaces. Energy arises from the unsaturated bonds on the surface. Energy depends on the surface characteristics or the material Degree of wetting by the molten solder will depend on the relative magnitudes of the surface energies for the solder and the substrate metallization.

20. 18.2 Packaging materials and properties cont. Adhesion Adhesion between dissimilar surfaces such as metals/polymers or ceramic/polymers is generally caused by weak chemical forces Metals and polymers are typically roughened in order to increase their adhesion Interaction has two contributions: Increased thermodynamic work of adhesion, resulting from large exothermic reactions at the interface Increased tensile strength, resulting from electrical charge injection into the polymer from the substrate.

21. 18.3 Materials Processing Main Processes used to make the single-chip packages or multichip or multilayered substrates. Thin-film, processes are used to build the subsequent dielectric layers, conductor and passive patterns.

22. 18.3 Materials Processing cont.

23. 18.3 Materials Processing cont. Ceramic Ceramic are generally regarded as high-performance materials because of their hermiticity, high reliability, low CTE and low losses Single-chip ceramic packaging exists in various forms dual-in-line packages (DIPS), chips carriers, flat packs and pin grid arrays.

24. 18.3 Materials Processing cont.

25. Thick Film Screen Printing • A widely used thick-film process for applying films of pastes on a substrate • Alumina is used for high temperature thick film hybrid technology • Thick-film pastes can be ceramic or polymer-based • Ceramic pastes are made up of active particles in a matrix of glass particles, organic filler materials and solvents. • Polymer pastes are cured at a lower temperature and aren’t stable at higher temperatures

26. Thick Film Screen Printing cont. • Key components to the screen printing process: • The Screen: a mask with openings at locations where paste is to be dispensed • Solder paste: applied to the top surface of the screen • The Squeegee: a rubber blade that travels along the screen pushing paste through the openings • The Board is held in place by a suitable fixture

27. Organic Thick Film • Organic materials make for excellent insulators • Widespread use in electronics because of their low cost, good dielectric properties, reasonable mechanical properties and ease of processing

28. Organic Thick Film Cont. • Common organic materials

29. Organic Thick Film Cont. • PWB-used for system-level and multichip packages. • Starting material consists of laminated layers of binder and reinforcement • A common binder is epoxy • Common reinforcements are woven glass fibers and paper • FR-4 is a glass/epoxy laminate and is the most common PWB today • Low stiffness, and high coefficient of thermal expansion • Not suitable for future applications involving multilayered thin-film structures and direct-chip attach

30. PWB Processes • Simplest has only one layer of copper metal foil for conductors on one side of the board • Conductor patterns are formed by lithography, using screen-printed resist or UV exposure • Referred to as “print and etch” Woven Glass fiber for PWB reinforcement

31. PWB Processes Cont. • 2-sided boards have copper conductor patterns on both sides • Surface mounted components are mounted on one side and hole-mounted components are mounted on the other with leads passing through the vias.

32. PWB Processes Cont. • Multi-layered boards are most complex version of PWB packaging • Conductor patterns are defined on each laminated layer and the interconnections are obtained with vias • Epoxy of one board has to adhere well to the copper of the other board. In order for this to occur, the copper is roughened using a micro-etch process • Drilling often causes the epoxy to soften due to frictional heating and creates an insulating layer on the walls of the holes • The smeared insulating layer is etched with plasma or strong oxidizers to combat this

33. Thin-Film Processes • Increased integration demands more layers on thick-film technologies • Thick film offers limited wiring density • Thus their ability to package highly integrated, high speed chips is limited • Led to the development of thin-film packages where lines are made of conductive metals • A combination of the two technologies has provided more design flexibility

34. Thin-Film Processes Cont. • Physical Vapor Deposition (PVD) • Vacuum Evaporation-deposition takes place in a vacuum because • Increase the mean free path of the evaporate particles • Reduce the vapor pressure • Remove atmosphere and other contaminants

35. Thin-Film Processes Cont. • Physical Vapor Depositon (PVD) • Sputtering-low pressure process where a target is bombarded with energetic positive ions. When the ions hit, particles are ejected from the target and hit the substrate that is to be covered. • The target material is torn off by the energy released and it deposits on the substrate • Typical deposition rate is 100-1000 angstroms/min

36. Thin-Film Processes Cont. • Chemical Vapor Deposition (CVD) • Process in which chemicals in vapor phase react to form a solid film on a surface

37. Thin-Film Processes Cont. • Solution Based: Physical • Spin coating: Thin-film is obtained by rotating the substrate at a high speed. Yields thicknesses from 2-20 microns.

38. Thin-Film Processes Cont. • Solution Based: Physical • Meniscus Coating-a liquid polymer solution is pumped out of a narrow slit on the top of a tube over which the substrate slides. • Material may be collected under the tube and re-circulated into the center of the tube • Dip Coating-involves the vertical motion of the substrate after being dipped in a reservoir

39. Thin-Film Processes Cont. • Solution Based: Chemical • Sol-Gel Deposition-allows for the deposition of films with a high degree of chemical homogeneity at relatively low temperatures • Hydrothermal Deposition-involves the dissolution of reactants and precipitation of products in hot, pressurized water. • A Standard technique used to form fine powders with superior physical and chemical properties

40. Thin-Film Processes Cont. • Solution Based: Chemical • Electroless plating-is a metal deposition process, usually in an aqueous solution medium, which proceeds by a chemical exchange reaction between the metal complexes in the solution and the particular metal to be coated • DOES NOT require external current

41. Thin-Film Processes Cont. • Solution Based Chemical • Electroplating-process of depositing an adherent metallic coating onto a conductive object immersed in an electrolytic bath composed of a solution of the salt of the metal to be plated • Depositon occurs by passing DC current through the electrolyte • Cheap and low temperature process

42. Photolithography • SINGLE MOST IMPORTANT process enabling the semiconductor and electronic industry • Used for transfer and definition of fine patterns that are not amenable by screen printing • Process is generated on CAD and is then transferred onto photographic film (photomask) • Photoresist- thin photosensitive material-used for transferring the pattern • The mask is then aligned with respect to the prior patterning on the substrate

43. Photolithography Cont. • Classified as negative or positive depending on whether light initiates cross-linking in the polymer making the illuminated portion difficult to dissolve in the developer (negative resist) or light breaks the molecules, making the illuminated portion easier to dissolve in the developer (positive resist)

44. Summary and Future Trends • Interconnections • Lead is highly toxic • Strong drive to replace lead in solders with other elements and yet retain its advantages • 2 approaches to lead free solders: • Lead free metallic solders • Conductive polymers

45. Summary and Future Trends • Interconnections Cont. • Rely on tin as base metal • Tin • considered one of least toxic metals, relatively inexpensive, sufficiently available and has desirable physical properties • Interacts very strongly with a wide range of metals, forming strong bonds. • Tin by itself is unacceptable because it whiskers, migrates under e-fields, has a high melting temperature and forms brittle grain structure at cold temperatures

46. Summary and Future Trends • Interconnections • What other metals? • Have to consider many aspects: • Melting temperature • Health risks • Wettability • Mechanical strength

48. Summary and Future Trends • Interconnections Cont. • For low cost electronic assembly, research has narrowed down to few binary eutectic alloys

49. Summary and Future Trends • Organic based electrical interconnections: • Polymers: • Generally non-conductive • Low die stress because of low modulus of the adhesives compared to solders and low processing temperature

50. Summary and Future Trends • Non-conductive adhesive: • Concept is relatively new • Adhesive does not by itself contribute to the electrical conduction. • The contact area has a metallic surface which, permits conduction by electron-tunneling