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Transistor-Transistor Logic and BiCMOS

Transistor-Transistor Logic and BiCMOS. Dr. T.Y. Chang NTHU EE 2007.12.11_13. Introduction. Diode-Transistor Logic Basic TTL NAND gate Schottky TTL BiCMOS Text Book: D.A. Neamen, Electronic Circuits Analysis And Design, 2nd ed. Chapters 17. Parameters. Diode-Transistor Logic.

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Transistor-Transistor Logic and BiCMOS

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  1. Transistor-Transistor Logic and BiCMOS Dr. T.Y. Chang NTHU EE 2007.12.11_13

  2. Introduction • Diode-Transistor Logic • Basic TTL NAND gate • Schottky TTL • BiCMOS Text Book:D.A. Neamen, Electronic Circuits Analysis And Design, 2nd ed. Chapters 17.

  3. Parameters

  4. Diode-Transistor Logic Logic-1=5V Logic-0=0.1V

  5. Example 17.8 @p1137 • Find Is and Vs in DTL as shown in Fig. 17.20 with =25.

  6. Evolution

  7. Multi-Emitter Cross Section

  8. TTL Inputs

  9. TTL Ex 17.9 Find Is, Vs, and Max. Fanout of Fig. 17.24. R=0.1, =25. • If No Rc  Called • Open-Collector TTL (OC TTL) • Wired-AND: • Connects outputs of OC TTLs • and adds an Rc

  10. TTL with Totem-Pole Output

  11. TTL Layout

  12. Fanout

  13. Modified Totem-Pole TTL

  14. Tristate Output =0 switch open =1 switch on

  15. Schottky BJT

  16. Schottky TTL

  17. Low-Power Schottky TTL

  18. Example 17.12 @p1154 • Calculate power dissipation in Fig. 17.34 with =25, V=0.7V, VCE(sat)=0.4V.

  19. Advanced Schottky TTL

  20. BiCMOS • CMOS • Low Power • Slower • BJT • Faster • High Power • Core: CMOS, Interface: BJT

  21. Basic BiCMOS Inverter • Totem-Pole Configuration (Q1-Q2) • Turn-off time • VOH=VDD－VBE(ON) • VOL=VBE(ON) 1 0

  22. BiCMOS Inverters =0V or = VDD =VBE(ON) or = VDD VBE(ON)

  23. BiCMOS Inverter I • Reduce Turn-off time • “bleeder resistors” R1 and R2 are added • VOH=VDD－VBE(ON) • VOL=VBE(ON)

  24. BiCMOS Inverter II • Reduce Turn-off time • VOH=VDD and VOL=0

  25. BiCMOS NAND2 Gate

  26. BiCMOS NOR

  27. Problem (Not HW) • Implement E=AB+CD in two-level TTL gates. • Implement a BiCMOS NAND gate.

  28. Solutions • E=AB+CD =((AB)’ (CD)’)’

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