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Ramp

Ref. Range Bit. Cf. High Gain. Buffered High Range Output. Shaper. Ccal. Buffered Low Range Output. Low Gain. VCal. Logic. Threshold. Buffered Timing Signal. Ramp. Common Timing Ramp. 200 ns. 8.3 ms. Common Wilkinson Ramp Generator. Wilkinson Scaler. Scaler Bus 12 bits.

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Ramp

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  1. Ref Range Bit Cf High Gain Buffered High Range Output Shaper Ccal Buffered Low Range Output Low Gain VCal Logic Threshold Buffered Timing Signal Ramp Common Timing Ramp 200 ns 8.3 ms

  2. Common Wilkinson Ramp Generator Wilkinson Scaler Scaler Bus 12 bits Threshold Timing Signal ADC Latch Threshold Latch (For Future zero suppression) Inputs from Page 1 ADC Latch ADC Latch Output Buffer

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