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SCI Basics Hugo Kohmann

SCI Basics Hugo Kohmann. What is SCI. The SCI standard ANSI/IEEE 1596-1992 defines a point-to-point interface and a set of packet protocols.

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SCI Basics Hugo Kohmann

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  1. SCI BasicsHugo Kohmann

  2. What is SCI • The SCI standard ANSI/IEEE 1596-1992 defines a point-to-point interface and a set of packet protocols. • The SCI protocols use small packet sizes with a 16-byte header and data sizes of 16, 64, (128) and {256} bytes. Each packet is protected by a 16-bit CRC code. An SCI interface has two unidirectional links that operate concurrently. • The SCI protocols support shared memory by encapsulating bus requests and responses into SCI request and response packets. Packet-based handshake protocols guarantee reliable data delivery. • SCI use 64 bits addressing and the most significant 16 bits are used for addressing up to 64K nodes. • A set of cache coherence protocols are defined to maintain cache coherence in a shared memory system. • Message passing is supported by a compatible subset of the SCI protocols. This protocol subset does not invoke SCI cache coherency protocols.

  3. Dolphins realization - The NodeChip - LC family • GaAs NodeChip • Dolphins first realization of SCI, 1993 • 500 MB/s Link Speed • Technology Licensed to Convex/Vitesse • CMOS NodeChip • Low Cost version, 1993 • 125 MB/s Link Speed • LC1 • Available since 1995 • 200 MB/s Link Speed • LC2 • Available since 1996 • 500 MB/s Link Speed • LC3 • Prototype in May 2000, Volumes in August 2000

  4. LC3 Overveiew • ANSI/IEEE Std 1596-1992 Compliant • LVDS Link Interface • ANSI/IEEE Std 1159.1 JTAG support • 272 Plastic BGA, Max 2 Watt • Worst case timing 166MHz. Tested at 250Mhz • 16 Internal buffers (8 Input / 8 Output ) • Virtual channels enables in order SCI packet delivery • Two wire serial line interface for configuration and management • Hardware Initialization • Automatic scrubber selection • Initial nodeid assignment • Performance Counters • Will count packets received, bypassed, transmitted, etc. • Masked compare of command symbol

  5. Overview (cont.) • B-LinkTM and BxBarTM CrossBar interface • Low Signal Count • Embedded SCI Packets (multiplexed address/data) • High Performance • Compliant with SCI • Enables Pipelining (multiple outstanding transactions) • B-Link 100 MHz, 64 bit Shared bus • BxBar 100 MHz, 2x32 Bit Crossbar Interface

  6. I2C/EPROM/PLD LC-3 CLK FLAG DATA (16) crc src addr/data tgt cmd cnt R/W 0,16,64, 128 bytes Lock Coherent... Time LinkController-3 Overview CLOCK FRAME B-Link Data Format tgt ... DATA code Embedded SCI Packet Time HERE B-Link BxBar post parity resrv crc BUSY 18 18 SCI out SCI in

  7. LC-3 APPLICATION EXAMPLE Node CPU CPU CPU Mem Node CPU CPU CPU Mem SCI Controller SCI Controller LC-3 LC-3 LC-3 LC-3 SCI FABRIC SWITCH Disk Subsystem I/O Expansion LC-3 LC-3 LC-3 LC-3 SCI SYSTEM SCI SYSTEM SCI SYSTEM PCI PCI PCI

  8. LC Simplified Block Diagram B-Link Clock Domain B-Link control routing lookup RAM queue control input queue 4 entry queue control output queue 4 entry CSR control B-Link Packet Asm IEEE init CRC calc CRC calc RAM based bypass FIFO 18 34 18 34 output control expand parser compress idle generator init control routing lookup RAM echo CAM deskew Upstream Clock Domain Downstream Clock Domain

  9. Sample Packet Traversal Req, trid 0 Req, trid 1 input queue output queue input queue output queue input queue output queue echo CAM echo CAM echo CAM bypass FIFO bypass FIFO bypass FIFO done echo bypass FIFO bypass FIFO bypass FIFO echo CAM echo CAM echo CAM output queue input queue output queue input queue output queue input queue

  10. input queue output queue echo CAM bypass FIFO Sample Packet Traversal (cont.) input queue output queue input queue output queue echo CAM echo CAM bypass FIFO bypass FIFO busy echo done echo bypass FIFO bypass FIFO bypass FIFO echo CAM echo CAM echo CAM output queue input queue output queue input queue output queue input queue

  11. input queue output queue echo CAM bypass FIFO Sample Packet Traversal (cont.) bypass FIFO echo CAM output queue input queue

  12. PSB66 • 64 bit / 66 MHz PCI Bridge • 313 BGA - Power consumption : 3 Watt • PCI 2.1 Compliant • Smart Chained DMA • DMA barrier operation • Complete or stop • Performance enhancements • > 300 MB/s • 128 Byte SCI packets ( short 256 ) • Enhanced Internal Logic • Samples available now • Volumes from December 2000

  13. LC-3 PSB LC-2 LC-2 LC-3 LC-3 LC-3 LC-3 LC-3 LC-3 Application Examples PCI-SCI Adapter card Low Cost 4-way Switch High Performance 8-way Scaleable Switch BxBar Crossbar

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