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Chapter 11 Basic I/O Interface

Chapter 11 Basic I/O Interface. Instructor : Dr. Alex Yu. Content. Introduction to I/O Interface I/O Port Address Decoding The Programmable Peripheral Interface 8254 Programmable Interval Timer 16550 Programmable Communications Interface A/D and D/A Converters. Basic I/O Instructions.

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Chapter 11 Basic I/O Interface

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  1. Chapter 11Basic I/O Interface Instructor:Dr. Alex Yu

  2. Content • Introduction to I/O Interface • I/O Port Address Decoding • The Programmable Peripheral Interface • 8254 Programmable Interval Timer • 16550 Programmable Communications Interface • A/D and D/A Converters

  3. Basic I/O Instructions • IN and OUT transfer data between an I/O device and the microprocessor's accumulator (AL, AX or EAX). • The I/O address is stored in: • Register DX as a 16-bit I/O address (variable addressing). • The byte, p8, immediately following the opcode (fixed address). IN AL, 19H ;8-bits are saved to AL from I/O port 19H. IN EAX, DX ;32-bits are saved to EAX. OUT DX, EAX ;32-bits are written to port DX from EAX. OUT 19H,AX ;16-bits are written to I/O port 0019H. • Only 16-bits (A0 to A15) are decoded. • Address connections above A15 are undefined for I/O instructions. • 0000H-03XXH are used for the ISA bus. • INS and OUTS transfer to I/O devices using ES:DI and DS:SI, respectively.

  4. Isolated versus Memory-Mapped I/O

  5. I/O Map

  6. Basic I/O Interface

  7. Basic I/O Interface

  8. Handshaking • I/O devices are typically slower than the microprocessor. • Handshaking is used to synchronize I/O with the microprocessor. • A device indicates that it is ready for a command or data (through some I/O pin or port). • The processor issues a command to the device, and the device indicates it is busy (not ready). • The I/O device finishes its task and indicates a ready condition, and the cycle continues. • There are two basic mechanisms for the processor to service a device. • Polling: Processor initiated. Device indicates it is ready by setting some status bit and the processor periodically checks it. • Interrupts: Device initiated. The act of setting a status bit causes an interrupt, and the processor calls an ISR to service the device. • Example 11-1 (pp368)

  9. Interfacing Circuitry • The terminal characteristics of the processor must be matched to those of the I/O devices. • Input Devices: • TTL (0.0V-0.8V low and 2.0-5.0V high) or compatible. • Switch-based; usually either open or connected. • These must be conditioned before they can be used properly. • For example, to make a simple (single-pole, single-throw) toggle switch TTL compatible: • This ensures that the output is held at either 0 or logic 1 at all times (it never floats).

  10. Interfacing Circuitry • Input Devices: • Mechanical switches physically bounce when they are closed (causing them to momentarily open after being closed). • This can cause a problem if they are used as a clocking signal. • Two asynchronous flip-flop solutions are given below: • The basic idea is that these flip-flops store the values even if the D/D nodes both float.

  11. Interfacing Circuitry • Output Devices: • Interfacing an output device requires matching the voltage and current relationshipsof the devices and processor. • Remember that the standard output levels of TTL compatible devices are 0.0 to 0.4V for logic 0 and 2.4V to 5.0V for logic 1. • The current levels are 0.0 to 2.0mA (logic 0) and 0.0 to 400uA (logic 1).

  12. I/O Port Decoding

  13. I/O Port Decoding • Example 11-4

  14. I/O Port Decoding • Output devices can be 16-bit in which case BHE is not needed. • Input devices can be 8-bit or 16-bit. • Note that instead of latches, high impedance buffers (74ALS244) are used in these cases. • 32-bit ports are becoming more popular because of PCI bus primarily. • The EISA and VESA local bus are also 32-bit buses. • For the 64-bit data buses of the Pentium, the I/O ports can appear in any of the 8 banks. • However, only 32-bit transfers are supported, as there are no 64-bit transfer instructions.

  15. Programmable Peripheral Interface (82C55) • The 82C55 is a popular interfacing component, that can interface any TTL-compatible I/O device to the microprocessor. • It is used to interface to the keyboard and a parallel printer port in PCs (usually as part of an integrated chipset). • Requires insertion of wait states if used with a microprocessor using higher that an 8 MHz clock. • PPI has 24 pins for I/O that are programmable in groups of 12 pins and has three distinct modes of operation. • In the PC, an 82C55 or its equivalent is decoded at I/O ports 60H-63H.

  16. Pinout of 82C55 PPI

  17. Interfacing the 82C55 PPI

  18. Programming the 82C55

  19. 82C55: Mode 0 Operation • Example 11-8,9,10

  20. 82C55: Mode 0 Operation • Mode 0 operation causes the 82C55 to function as a buffered input device or as a latched output device. • In previous example, both ports A and B are programmed as (mode 0) simple latched output ports. • Port A provides the segment data inputs to display and port B provides a means of selecting one display position at a time. • Different values are displayed in each digit via fast time multiplexing. • The values for the resistors and the type of transistors used are determined using the current requirements (see text for details). • Textbook has the assembly code fragment demonstrating its use. • Examples of connecting LCD displays and stepper motors are also given.

  21. Programmable Communications Interface: 16550 • A universal asynchronous receiver/transmitter (UART). • Operation speed: 0-1.5M Baud (Baud is # of bits transmitted/sec, including start, stop, data and parity). • Includes: • A programmable Baud rate generator. • Separate FIFO buffers for input and and output data (16 bytes each). • Asynchronous serial data: • Transmitted and received without a clock or timing signal.

  22. Programmable Communications Interface: 16550

  23. Pinout of the 16550 • A0, A1 and A2: Select an internal register for programming and data transfer. • ADS: Address strobe used to latch address and chip select. Not needed on Intel systems —— connected to ground. • BAUDOUT: Clock signal from Baud rate generator in transmitter. • CS0, CS1, CS2: Chip selects • CTS: Clear to send -- indicates that the modem or data set is ready to exchange information. (Used in half-duplex to turn the line around).

  24. Pinout of the 16550 • D7-D0: The data bus pins are connected to the microprocessor data bus. • DCD: The data carrier detect -- used by the modem to signal the 16550 that a carrier is present. • DDIS: Disable driver output -- set to 0 to indicate that the microprocessor is reading data from the UART. Used to change direction of data flow through a buffer. • DSR: Data set ready is an input to 16550 -- indicates that the modem (data set) is ready to operate. • DTR: Data terminal ready is an output -- indicates that the data terminal (16550) is ready to function. • INTR: Interrupt request is an output to the micro -- used to request an interrupt. • Receiver error • Data received • Transmit buffer empty • MR: Master reset -- connect to system RESET • OUT1, OUT2: User defined output pins for modem or other device. • RCLK: Receiver clock -- clock input to the receiver section of the UART. • Always 16X the desired receiver Baud rate.

  25. Pinout of the 16550 • RD, RD: Read inputs (either can be used) -- cause data to be read from the register given by the address inputs. • RI: Ring indicator input -- set to 0 by modem to indicate telephone is ringing. • RTS: Request-to-send -- signal to modem, indicating UART wishes to send data. • SIN, SOUT: Serial data pins, in and out. • RXRDY: Receiver ready -- used to transfer received data via DMA techniques. • TXRDY: Transmitter ready -- used to transfer transmitter data via DMA. • WR, WR: Write (either can be used) -- connects to micro write signal to transfer commands and data to 16550. • XIN, XOUT: Main clock connections -- a crystal oscillator can be used.

  26. Programming the 16550 • Two phases: Initialization, operation. • Initialization: • After RESET, the line control register and baud rate generator need to be programmed. • Line control register sets the # of data bits, # of stop bits and the parity. • Addressed at location 011. • Stop bits: S = 1, 1.5 stop bits used for 5 data bits, 2 used for 6, 7 or 8.

  27. Programming the 16550 - Initialization • ST, P and PE used to send even or odd parity, to send no parity or to send a 1 or a 0 in the parity bit position for all data. • No parity, both 0 -- used for internet connections. • SB = 1 causes a break to be transmitted on SOUT. • A break is at least two frame of 0 data. • DL = 1 enables programming of the baud rate divisor.

  28. Programming the 16550 - Initialization • Baud rate generator is programmed with a divisor that sets baud rate of transmitter. • Baud rate generator is programmed at 000 and 001. • Port 000 used to hold least significant byte, 001 most significant. • Value used depends on external clock/crystal frequency. • For 18.432MHz crystal, 10,473 gives 110 band rate, 30 gives 38,400 baud. • Note, number programmed generates a clock 16X the desired Baud rate. • Last, the FIFO control register must be programmed at 010.

  29. Programming the 16550 - operation • Status line register gives information about error conditions and state of the transmitter and receiver. • This register needs to be tested in software routines designed to use the 16550 to transmit/receive data. • Suppose a program wants to send data out SOUT. • It needs to pool the TH bit to determine if transmitter is ready to receive data. • To receive information, the DR bit is tested.

  30. Programming the 16550 - operation • It is also a good idea to check for errors. • Parity error: Received data has wrong error  transmission bit flip due to noise. • Framing error: Start and stop bits not in their proper places.  This usually results if the receiver is receiving data at the incorrect baud rate. • Overrun error: Data has overrun the internal receiver FIFO buffer Software is failing to read the data from the FIFO. • Break indicator bit: Software should check for this as well, i.e. two consecutive frames of 0s. • The other registers (for interrupt control and modem control) will be discussed in next chapter.

  31. Example of 16550 • Example 11-25,26,27

  32. Programmable Interval Timer: 8254 • Three independent 16-bit programmable counters (timers). • Each capable in of counting in binary or BCD with a maximum frequency of 10MHz. • Used for controlling real-time events such as real-time clock, events counter, and motor speed and direction control.

  33. 8254 Functional Description

  34. 8254 Pin Definitions • A1, A0The address inputs select one of the four internal registers with the 8254 as follows: • CLKThe clock input is the timing source for each of the internal counters. • CSChip Select enables the 8254 for programming, and reading and writing. • GThe gate input controls the operation of the counter in some modes. • OUTA counter output is where the wave-form generated by the timer is available. • RD/WRRead/Write causes data to be read/written from the 8254 and often connects to the IORC/IOWC.

  35. 8254 Programming • Each counter is individually programmed by writing a control word, followed by the initial count. • The control word allows the programmer to select the counter, model of operation, binary or BCD count and type of operation (read/write).

  36. 8254 Programming • Each counter may be programmed with a count of 1 to FFFFH. • Minimum count is 1 all modes except 2 and 3 with minimum count of 2. • Each counter has a program control word used to select the way the counter operates. • If two bytes are programmed, then the first byte (LSB) stops the count, and the second byte (MSB) starts the counter with the new count. • There are 6 modes of operation for each counter:

  37. Mode 0

  38. Mode 0

  39. 分频器 端口地址 80~83H Mode 0 程序如下: MOV AL,01110000B OUT 83H,AL ;1#计数器,二进制计数, 方式0 ,高低8位均写 MOV AL,09H OUT 81H,AL ;写入低8位 MOV AL,3DH OUT 81H,AL ;写入高8位

  40. Mode 1

  41. Mode 1

  42. 10s 10s Mode 1 • 自动门控制 有人到时,光传感器发信号给GATE1,8253开始作10s计时,并将门打开。若10s内无人过来,定时到时,门关上;若有人过来,门将继续打开,并延时10s后关闭。 设fCLK1=100HZ,计算: fCLK1 /C=fOUT =1/TOUT 1 C= fCLK1× TOUT 1=100×10=1000 初始化程序: MOV AL,01100011B OUT 83H,AL ;1#计数器,方式1工作, BCD计数,只写高8位。 MOV AL,10H OUT 81H,AL ;高8位计数值为0001 0000BCD, 低8位计数值为0000 0000BCD 100HZ 光传感器

  43. Mode 2

  44. Mode 2 设fCLK1=50HZ 初始化程序: MOV AL,01010100B OUT 83H,AL ;1#计数器,方式2工作,二进制计数,只写低8位。 MOV AL,0AH OUT 81H,AL ;计数值为10,高8位自动清零 fCLK1 /C= fout1 =1/[(9+1) TCLK1] = fCLK1 /10  C=10= 0AH 9 1 9 1

  45. Mode 3

  46. 100KHZ 单位:ms Mode 3 计算:fCLK1 /C3=1/100ms C3= 100 × 103× 0.1 =10000 初始化程序: MOV AL,01110111B OUT 83H,AL ;1#计数器,方式3工作, BCD计数,高低8位均写。 MOV AL,00H OUT 81H,AL OUT 81H,AL ;高8位计数值为0000 0000BCD, 低8位计数值为0000 0000BCD 即计数值为10000。 0 50 100

  47. Mode 4

  48. Mode 4

  49. Mode 5

  50. Mode 5

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