Buried Object Detection Forward Model

1. Goal Speedup Finite-Difference Time-Domain (FDTD) Algorithm through the use of Field Programmable Gate Arrays (FPGAs). Abstract 3D Finite-Difference Time-Domain is a powerful method for modeling the electromagnetic field. The 3D FDTD buried object detection forward model is emerging as a useful application in mine detection and other subsurface sensing areas. However, the computation of this model is complex and time consuming. Implementing this algorithm in hardware will greatly increase its computational speed and widen its usage in many other areas. We present a FPGA implementation to speedup the FDTD algorithm. We transfer the 3D FDTD model and complete boundary conditions to the FPGA. Our FDTD core is suitable for other FDTD applications too. The computational speed on the reconfigurable hardware is greatly increased over the software implementation. 2D TM Wave Hardware Structure 2D TE Wave Hardware Structure Buried Object Detection Forward Model • The 3D FDTD Buried Object Detection Forward Model used in this project was developed by Panos Kosmas and Dr. Carey Rappaport of Northeastern University. It is designed for buried object detection using 3D FDTD in different kinds of soil and buried object conditions. • The forward model simulates the whole electromagnetic space and wave propagation in the model space. (As figures in the middle of this poster) • We simplified model from 3D to 2D, which can be easily expand to 3D later. • Quantize the double floating-point precision data to fix-point data. Electric Field Pipeline Module FIREBIRD™/PCI Reconfigurable FPGA Computing Engine • Firebird is a product of Annapolis Micro Systems, Inc. • Firebird is the target for our hardware implementation. • The features of the FIREBIRD™/PCI boards are : • · Uses Xilinx® VIRTEX™-E FPGAs XCV2000E • · Processing clocks up to 150MHz • · Five independent memory banks (4 x 64-bit, 1 x 32-bit) • · 5.4Gbytes/sec of memory bandwidth • · 3Gbytes/sec of I/O bandwidth 64-bit floating-point 28-bit fix-point Quantization FPGA Implementation of the 3-D FDTD Algorithm This work was supported in part by CenSSIS, the Center for Subsurface Sensing and Imaging Systems, under the Engineering Research Centers Program of the National Science Foundation (Award Number EEC-9986821). Wang Chen , Dr. Miriam Leeser , Dr. Carey Rappaport wchen@ece.neu.edumel@ece.neu.edurappaport@ece.neu.edu Hardware Implementation Implementing the FDTD Algorithm in hardware will greatly increase its computational speed and widen its usage in many other areas. Work in Progress 2D FDTD Model Hardware Structure • Simplified and Quantized the 2D FDTD model as first step. • Designed, simulated and synthesized modules for: Electrical field update, Magnetic field update, Memory interface Boundary condition and Full datapath. The Quantized Fix-point Simulation • Complete the 2D FDTD TE Wave model in hardware. • Working on TM Wave model, with different structure shown below. Reconfigurable Hardware Hardware design • Figures above are the hardware structure of the 2D FDTD Free space model. The basic structure has three parallel pipelines. Two pipelines are used to update Electric Field, the other one is used to update Magnetic Field. • We have 5 on-board memories and we use all of them. Four memories are used for memory updating and the last one is used to store the source field value. • The detailed structure of electric field pipeline module Exs is shown in the figure on the right side. Future Work Reference • Adding Different Soil and buried object conditions to the 2D Model. • Testing and comparing the speed of 2D FDTD hardware and software design. • Expanding the 2D FDTD model to 3D FDTD model. [1] Ryan N. Schneider, Laurence E. Turner, Michal M.Okoniewski, “Application of FPGA Technology to Accelerate the Finite-Difference Time-Domain (FDTD) Method”, FPGA 2002. [2] Karl S. Kunz, Raymond J. Luebbers, “The Finite Difference Time Domain Method for Electromagnetics”, CRC Press, 1993."