Embedded Architecture Description Language

1. Embedded Architecture Description Language Qiang Liu School of Software, Tshinghua University Joint work with Juncao Li, Nick Pilkington, and Fei Xie Dept. of Computer Science, Portland State Univ.

2. Agenda • Problems • Unified Component Model • EADL • EADL in Embedded System Dev. • Conclusions and Future Work 2

3. Problems • Lack of architectural specification support for co-design • Hardware (or software) only • HW and SW in the same language • Little consideration of verification and verification reuse • Not considered when defining embedded system architectures • Very limited verification reuse

4. Our Contributions • Embedded Architecture Description Language • Component-based architectures of both hardware and software • Flexible platform-oriented semantics instantiation • Design reuse and verification reuse • Apply EADL to • Co-design • Co-verificaition • Co-simulation

5. Agenda Problems Unified Component Model EADL EADL in Embedded System Dev. Conclusions and Future Work 5

6. Unified Component Model • Unifying hardware and software component models • Component = (Design, Interface, Properties) • HW, SW, and bridge components • Different design and interface specification languages • Same property specification language • Verified properties are associated with components Software Component Bridge Component Hardware Component Software Component Software Component Bridge Component Hardware Component

7. Bridge Components: Filling Semantics Gap • Dual interfaces: hardware and software • Bridge design • Abstracts processor, bus model, and embedded OS • Maps between HW and SW events • Is fully synthesizable • Supports both co-simulation and co-verification Interactions follow software semantics Interactions follow hardware semantics Software Component Bridge Component Hardware Component

8. Transactional Bridge Spec Language • Event mappings implemented by transactors C Verilog • Transactor spec inherits from HW and SW languages

9. Component Property A property of a component C is a pair (p, A(p)) p is a temporal assertion A(p) is a set of assumptions on environment of C pis verified assumingA(p)holds. A(p) Assumptions = Assumed Properties Environment of C (Components interacting with C ) A(p) p holds on C p C 9

10. Agenda Problems Unified Component Model EADL EADL in Embedded System Dev. Conclusions and Future Work 10

11. Embedded Architecture Description Lang. • Component-based semantics overlay • Complete architectural semantics • Incomplete execution and interface semantics • Platform-oriented instantiation • Platform provides HW, SW, and BSL semantics • EADL supplies architectural semantics Embedded Architecture Description Language SW Semantics (NesC) Bridge Semantics (BSL) HW Semantics (Verilog)

12. Key EADL Language Features

13. VisualEADL: Tool Support for EADL

14. An Architectural Pattern Example

15. Architecture-Aware Property Specification

16. Property Specification Tool Support

17. Agenda Problems Unified Component Model EADL EADL in Embedded System Dev. Conclusions and Future Work 17

18. Component-Based Co-Design • Platform initialization • Analyze application domain • Define bridge spec. language • Identify architectural patterns • Identify reusable components • Verify components bottom-up • A platform for embedded systems: • Processors and buses • Embedded OS • HW, SW, and bridge spec. languages • Library of reusable components • Libraries of ports, component templates • and architectural patterns • Platform-oriented pattern-guided • component-based co-design • Select architectural patterns • Partition system into comps. • Reuse components • Develop new components • Verify system top-down • Platform extension • Identify new architectural patterns • Identify new reusable comps. • Create and verify larger reusable comps. bottom-up • Extend pattern and comp. libs 18

19. Embedded System IDE (ESIDE) 19

20. Component-Based Co-Simulation HDL Source Code NesC Source Code Bridge Components (BSL) HW Application Components SW Application Components HW Platform Components SW Platform Components BSL Compiler NesC Compiler C Code HDL Compiler C Compiler HW Executable SW Executable PLI ModelSim Giano 20

21. NesC Compiler Pre-Processor C Code Verilog Code C Compiler Verilog Compiler SW Executable HW Executable Tool Support for Transactional BSL • For verification – Direct compilation to formal languages • For simulation and deployment – Indirect compilation SW Components (NesC) Bridge Components (BSL) HW Components (Verilog) BSL Compiler Configuration

22. Component-Based Co-Verification • Property formulation problems • What are the system properties to verify • What are the component properties needed • What are the environment assumptions • Architecture-based property formulation and Reuse • Port • Component template • Architectural pattern

23. Component Template Architectural Pattern Port Visible Variables Properties from Architectural pattern; Decomposition strategies Port Sub-Component Properties from Component template Port Sub-Component Sub-Component Properties from Port 3-Tier Architectural Reuse in Co-Design Problem addressed: property formulation and decomposition Component 23

24. Co-Verification Tool Support 24

25. Agenda Problems Unified Component Model EADL EADL in Embedded System Dev. Conclusions and Future Work 25

26. Conclusions and Future Work • Developed EADL • Component-based architectures of both hardware and software • Flexible platform-oriented semantics instantiation • Design reuse and verification reuse • Demonstrated effectiveness in support to • Co-design, co-simulation and co-verification • Future work • Other component properties rather than temporal correctness 26

27. Further Information • Website: • http://www.cs.pdx.edu/~xie/co-ver/co-ver-home.htm • Email: • juncao@cs.pdx.edu Questions? 27