Error Detection/Correction

1. Error Detection/Correction Section 1.7 Section 3.9 Bonus Material: Hamming Code

2. ASCII Code

3. Communication Control Characters: frame a text message. Format effector: control layout

4. ASCII Examples • ASCII A=1000001 • ASCII T=1010100

5. ASCII Code 1011001 (Y) 1001110 (N) If the probability of a bit flipping event is 1%, what is the likely hood that 4 bits are flipped simultaneously?

6. Parity Bit • ASCII characters are stored one per byte (8 bits) • The leftmost bit is called the parity bit • A parity bit is an extra bit included with a message to make the total number of 1’s either even or odd.

7. Examples of Parity Bit • Even Parity • ASCII A=01000001 • ASCII T=11010100 • Odd Parity • ASCII A=11000001 • ASCII T=01010100

8. Signal Transmission Algorithm • (Even Parity System) • A parity bit is generated and attached to the raw data • An eight-bit sequence including the parity bit aresent. • The parity of each character is checked at the receiving end. • If the parity of the received character is not even, then at least one bit has changed value during transmission. The sender must retransmit the signal.

9. Parity Generator • The circuit that generates the parity bit in the transmitter is called a parity generator. (Truth Table)

10. Parity Checker • The Circuit that checks the parity in the receiver is called a parity checker.

11. Limitation of Parity Checking (1) (1)

12. Hardware implementation • Review of two-terminal XOR/XNOR • Three terminal XOR/XNOR • Hardware Implementation

13. Two-terminal XOR • Equal to 1 if x and y differ in value • Alternative description: equal to 1 if an odd number of variables equal to 1 • Characteristics:

14. Gate Level Implementation of XOR

15. Alternative Implementation of XOR • (A’B’)’=A+B

16. Parity Generator • The circuit that generates the parity bit in the transmitter is called a parity generator. (Truth Table)

17. Three-Terminal XOR • equal to 1 if there is an odd number of variables equal to 1

18. Four-Input Odd Function

19. Parity Error Check Since , if P=0, the same circuit can be used as a 3-bit even parity generator. zP

20. Error Correction • Hamming Code • Use check bits to correct error

21. Raw Data Notation: (bit 1, bit 2, bit 3) 000 001 010 011 100 101 110 111

22. Add Check Bits Notation: (bit 1, bit 2, bit 3, bit 4, bit 5, bit 6) CC0C00 CC0C01 CC0C10 CC0C11 CC1C00 CC1C01 CC1C10 CC1C11

23. Generate the First Check Bit 0C0C00 0C0C01 1C0C10 1C0C11 1C1C00 1C1C01 0C1C10 0C1C11 Check bit 1 looks at bit 3 and bit 5. Check bit 1=

24. Generate the Second Check Bit 000C00 010C01 100C10 110C11 111C00 101C01 011C10 001C11 Check bit 2 looks at bit 3 and bit 6. Check bit 2=

25. Generate the third Check Bit 000000 010101 100110 110011 111000 101101 011110 001011 Check bit 4 looks at bit 6 and bit 5. Check bit 4=

26. Hamming Code 000000 010101 100110 110011 111000 101101 011110 001011 Blue: Check bits Black: Data bits

27. Error in a Data Bit • Data Bit: 100 • 111000 • Error occurs in the 6th bit, we get 111001 instead. • Expected check bit 1:. OK • Expected check bit 2:. Problem! • Expected check bit 4:. Problem! • The bad bit is 2+4=6!

28. Error in the Check Bit • Data Bit: 100, Check Bit: 110 • 111000 (No error) • Error occurs in the 1thbit, we get 011000instead. • Expected check bit 1:. Problem! • Expected check bit 2:. OK • Expected checkbit 4:. OK • The bad bit is bit number 1.