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EEL-3705 TPS QUIZZES

EEL-3705 TPS QUIZZES. Chapter 4. Quiz 4-1. Using the 2x4 Decoder shown below and two-input OR gates, design a logic circuit which implements. Solution. Quiz 4-2. Using the 3x8 Decoder shown below and two-input OR gates, design a logic circuit which implements. Solution. Solution. Quiz 4-3.

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EEL-3705 TPS QUIZZES

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  1. EEL-3705TPS QUIZZES Chapter 4

  2. Quiz 4-1

  3. Using the 2x4 Decoder shown below and two-input OR gates, design a logic circuit which implements

  4. Solution

  5. Quiz 4-2

  6. Using the 3x8 Decoder shown below and two-input OR gates, design a logic circuit which implements

  7. Solution

  8. Solution

  9. Quiz 4-3

  10. Using the 3x8 Decoder shown below and two-input OR gates, design a logic circuit which implements

  11. Solution

  12. Quiz 4-4a

  13. Using 3x8 Decoders with Active LOW Enables and NOT gates, design a logic circuit which implements a 4x16 decoder

  14. Solution

  15. Quiz 4-4b

  16. Using standard two-input and three-input logic gates, design an encoder circuit that implements the following truth table

  17. Solution 1 1 1 1

  18. Y1

  19. Solution 1 1 1 1

  20. Y0

  21. Quiz 4-5

  22. Using standard two-input logic gates, design a 2X1 MUX which implements Your circuit should have three inputs, Data inputs D0 and D1, and control input S. Hint: Develop the truth table first

  23. Solution

  24. Solution

  25. Demonstrations

  26. 1 bit deep 2x1 MUX 2 Logical Data Inputs 1 bit deep 1 Control Input 1 Logical Output 1 bit deep

  27. 1 bit deep 4x1 MUX 4 Logical Data Inputs 1 bit deep 2 Control Inputs 1 Logical Output 1 bit deep

  28. 2 bits deep 2x1 MUX 2 Logical Data Inputs 2 bits deep 1 Control Input 1 Logical Output 2 bits deep

  29. 2 bits deep 4x1 MUX 4 Logical Data Inputs 2 bits deep 2 Control Inputs 1 Logical Output 2 bits deep

  30. 4 bits deep 2x1 MUX 2 Logical Data Inputs 4 bits deep 1 Control Input 1 Logical Output 4 bits deep

  31. Quiz 4-6

  32. Using the 2X1 MUX shown below and NOT gates, design a logic circuit which implements:

  33. Solution We need We have Let a=s, D0=b, D1=b

  34. Quiz 4-7

  35. Using standard two-input logic gates, design a 2X1 MUX with Enable which implements Your circuit should have four inputs, Data inputs D0 and D1, and control inputs E and S.

  36. Solution

  37. Solution

  38. Quiz 4-8

  39. Design a 4x1 MUX using the 2x1 MUX with enable shown below, NOT, and OR gates Your design should implement this equation

  40. Solution

  41. Quiz 4-9

  42. Using the 4x1 MUX shown below and NOT gates, design a logic circuit which implements

  43. Solution

  44. Quiz 4-10

  45. Using the 4x1 MUX shown below and NOT gates, design a logic circuit which implements

  46. Solution c c F c c a b

  47. Class Design Project

  48. Quiz 4-11 Module A

  49. Design a logic circuit (let’s call this module A) which converts a three bit signed magnitude input into its equivalent three bittwo’s complement output. Let X2=0 indicate a positive number and X2=1 indicate a negative number.X1 and X0 represent the magnitude of the number. For example Module A INPUT: X[2..0] OUTPUT: A[2..0] Hint: Really this is a hint !!!, Develop the truth table for all possible input combinations

  50. Solution

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