Memory

1. Memory How a computer stores information (revision)

2. Basic Computer Architecture processor (CPU) memory bus I/O devices

3. What is memory? • A collection of individual storage cells • These cells are known as locations • Each location can store a fixed number of bits • Each has a unique address

4. Memory example Example data only

5. Hex address • We tend to use Hex, it’s easier than binary to remember, and closer related to the binary than decimal is • As an assembly language programmer, you will often have to refer to addresses. • You will find this out for yourselves later in the course – so get used to it!

6. Jargon • A byte is (usually) 8 bits of data, e.g. 00101101 • For the purposes of this course, we will assume we always mean 8 bits when we talk about a byte • Don’t get confused between bytes and bits – it’s easily done. • e.g. we talk of a 256 megabyte memory chip, but a 56 kilobit modem or 8 megabit broadband. Remember this when estimating transfer times!!!

7. More confusion • What is a kilobyte? • You’d think it would be 1000 bytes, right? • Wrong. Well, usually. A kilobyte is usually 1024 byte (210) • In 2000, the International Electrotechnical Commission defined the terms kibi-, mibi- , gibi- and tebi- byte for 10241, 10242, 10243 and 10244 bytes (symbols KiB, MiB, GiB, TiB), but they certainly aren’t universally used

8. More jargon • A word of memory is the contents of a single memory location • So an n-bit word is a word comprising n bits of data, e.g. a 16-bit word, or a 32-bit word • An n-bit machine is a processor designed to work mainly with n-bit words • Operating systems – 16 bit, 32 bit, 64 bit…

9. Basic Memory Unit enable 1-bit memory read/write control or a single data I/O line data in data out

10. Basic Memory Unit (2) • But we deal with words of memory, and we read or write the whole word at a time • So we only need one enable line and one read/write line for the whole word • But we still need separate data I/O lines (why?)

11. One (4-bit) word of memory common enable common read/write control data I/O data I/O data I/O data I/O

12. The Bus A collection of wires which carry data between the CPU, memory and I/O devices

13. Components of the Bus Address Bus carries memory address values from the CPU to the memory and I/O Data Bus carries all data, including machine codes, in all directions Control Bus a small number of wires carrying the read/write and enable signals, and a few other “control” signals

14. Important Bus Parameters Width of the address bus Determines the size of the address space – i.e. how many locations can be addressed Width of the data bus Determines how much data can be transferred in a single data transfer cycle (thus affecting the speed). Usually the same as the machine (and memory) word size Bus Speed The number of transfers possible per second

15. Bus Width • An address or data bus that contains n wires, or lines, is said to be n lines wide. • Such a bus can carry an n-bit number in a single operation • This does not apply to the control bus, as it only needs to carry simple control signals

16. Example 8-bit Bus 8 lines physically… but on a circuit diagram… 8

17. Address Space • An n bit address bus can carry any address that fits into an n bit binary number • Therefore, it can carry 2npossible addresses • These will be 0 to 2n-1 • e.g. an address bus with 16 lines can address 216 (=65536) locations; a 32 line address bus can address 232 (=4,294,967,296) locations

18. Bus Cycles Bus cycle A single data transfer operation over the bus. The speed of this operation is governed by the bus speed, and affects the speed of the computer Read cycle A bus cycle in which data is read by the CPU from memory or an I/O device Write cycle A bus cycle in which data is written by the CPU to memory or an I/O device

19. Example: Bus Read Cycle undefined undefined control bus lines undefined

20. Bus Read Cycle t1 CPU puts address on address bus and sets R/W line to 1 (=read) t2 CPU asserts Valid Address line on control bus t3 memory responds by putting data on data bus t4 CPU reads data from data bus, and stops asserting valid address. Next cycle begins

21. Data Throughput • The data throughput rate is the number of bytes (or bits) that can be transferred over the bus in one second. • Therefore, it is the product of the bus speed (cycles per second) and the data bus width (bits per cycle)

22. Data Throughput Example • A 16-bit data bus running at 10 million cycles per second (10 Megahertz) has a data throughput rate of 20 million bytes (or 160 million bits) per second • Data throughput rate is a major limitation on the speed of a computer. That is why powerful computers have very wide data buses

23. Who Controls the Bus? • In a simple system, always the CPU • but note DMAC later in this course • For each bus cycle, the CPU must: • specify the address • select read or write • supply the data, if it’s a write

24. The CPU Central Processing Unit

25. Reminder - how it fits together processor (CPU) memory bus I/O devices

26. What does the CPU do? The CPU is the heart of the computer. it: • Executes programs written in machine code • Performs arithmetic and logic calculations • Controls the bus • Controls the operation of memory and I/O devices, via the bus

27. How does the CPU do this? • When you want the CPU to perform a task, how does it know? • It knows, because it gets operations to perform from memory • It is continually reading machine code instructions, executing them, and going on to the next instruction • This is called the “fetch-execute cycle”, and is what the CPU does nearly all of the time

28. The Fetch-Execute Cycle • Read the next machine-code instruction from memory • Perform the actions specified by that instruction

29. What actions must be included in a set of machine-code instructions? • Load Data • (from a specified memory or I/O address) • Store Data • (to a specified memory or I/O address) • Operate on Data • arithmetic and logical operations • What else?

30. CPU Registers • The CPU needs to store some data internally • Other data can be stored internally, to speed up operations (memory accesses take a relatively long time) • For this purpose, the CPU has registers • These are simple (typically 8 or 16 bit) storage units inside the CPU

31. Examples of Register Use • The address of the next machine-code instruction • the address-bus value for the current bus cycle • the value of the current instruction • the result of the most recent arithmetic operation

32. What is a register? • A register is a collection of flip-flops! • As we saw, each flip-flop can store only one bit (a 1 or a 0), so we need a string of them • When a value is written to the flip-flop, it stores that value as long as the power remains on, or until it is overwritten with another value

33. A very simple CPU

34. MAR Memory Address Register - controls the address bus MBR Memory Buffer Register - interface to data bus (also called MDR: Memory Data Register) IR Instruction Register - contains current instruction (often divided into an op-code and an address) op-code Operation code - the part of a machine-code operation that specifies the operation Some abbreviations

35. PC Program Counter - address of next instruction (don’t get confused by the term “PC”!) Acc Accumulator - holds operands and results of ALU operations ALU Arithmetic Logic Unit - performs addition, subtraction, logical AND, logical OR etc. Some abbreviations

36. The Control Unit (1) • Translates each op-code (which is simply a binary number) into a sequence of primitive actions • These actions carry out the operation specified by the op-code

37. The Control Unit (2) Primitive actions are: • switching data pathways on and off • clocking data into and out of registers • selecting ALU functions These actions are carried out by internal control lines (nothing to do with the control bus!)

38. Example: how the CPU executes a command For all commands: • copy PC to MAR; increment PC • program counter contains memory address of next op-code • perform bus read cycle • causes op-code to be read from memory location now held in MAR • copy MBR to IR (op-code) • MBR (input from data bus) will contain the op-code, read from memory; this is copied into the Instruction Register

39. Example: store accumulator to memory This op-code is going to require an address, so we will need to get that next • copy PC to MAR; increment PC • get the memory address for store operation from next memory location • perform bus read cycle • copy MBR to IR (addr) • we now have the op-code and address in the IR • copy IR(addr) to MAR • specify in MAR where we’re going to write to • copy accumulator to MBR • ready to go out on data bus • perform bus write cycle • causes contents of MBR to be written to address held in MAR

40. What’s happening? • Follow the example on the previous two slides, with reference to the CPU diagram

41. Test Yourself! • What is the fetch-execute cycle? • What are CPU registers used for? • What is a flip-flop? • Can you identify all the components of the CPU in the diagram given? Can you remember what they do? See next slide… • Write down the sequence of operations the CPU has to perform to implement read accumulator from memory

42. Fill in the blanks Possible question: What is the component labelled x? Or: label the blanks