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CSC: Motivation and Scenarios of Early (“Phase I”) Upgrades

CSC: Motivation and Scenarios of Early (“Phase I”) Upgrades . Alexei Safonov (Texas A&M University) For the EMU community. Scope of Proposed Upgrades. Improve redundancy Add station ME-4/2 covering h =1.1-1.8 Critical for momentum resolution Upgrade electronics to sustain higher rates

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CSC: Motivation and Scenarios of Early (“Phase I”) Upgrades

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  1. CSC: Motivation and Scenarios of Early (“Phase I”) Upgrades Alexei Safonov (Texas A&M University) For the EMU community

  2. Scope of Proposed Upgrades • Improve redundancy • Add station ME-4/2 covering h=1.1-1.8 • Critical for momentum resolution • Upgrade electronics to sustain higher rates • New DCFEB boards for station ME-1/1 • Also a must for increased latency • Forces upgrade of downstream EMU electronics • Particularly TMB and DMB • Upgrade MPC and CSCTF to handle higher stub rate • Extend CSC Efficiency into h=2.1-2.4 region • Robust operation requires TMB upgrade, unganging strips in ME-1a, new DCFEBs, upgrade CSCTF+MPC • Possibly not all at the same time • Notes: • Points (2) and (3) are achieved simultaneously • Smooth transition to Phase II (no re-upgrades)

  3. Disclaimer • Although hands down the best in CMS, our SLHC simulation has shortcomings: • No neutron backgrounds • No beam backgrounds • These can be large effects: • Note 2002/007: at LHC Lumi neutron rate is +25% of prompt • Could be +250% at SLHC (assuming every neutron gives 2-3 hits, quadratic dependence - ask D. Acosta for details) • To offset this shortcomings, I use prompt-only rates from simulation w/ 400 PU as a conservative (?) estimate for prompt+non-promptrates with ~100PU

  4. ME4/2 upgrade “Empty” YE3 disk ready for ME4/2 R-Z cross-section

  5. ME4/2 Upgrade • Efficiency gaps for good quality CSC TF tracks disappear with addition of ME4/2

  6. ME4/2 Upgrade Motivation Triggering with & without the ME4/2 upgrade: Level 1 trigger threshold is reduced from 48  18 GeV/c Target Rate 5 kHz Ingo Bloch, Norbert Neumeister, Rick Wilkinson

  7. EMU Electronics Upgrades

  8. CFEB Board Upgrade • Current CFEBs: • Self-triggers (pre-LCT) and awaits L1 Accept • SCA: analog charge storage • 96 capacitors per channel - bottleneck • SLHC: 10% of the time SCA overused • Pure electronics limitation: • ME-1/1 – highest rate, needs to be replaced in Phase I

  9. ME-1/1: New Digital (D)CFEB • Replace Conventional ADC and SCA storage with Flash ADC and Digital Storage • Deadtimeless, no rate worries • Similar cost to old system • Fairly radical design,i.e. couldn’t build 8 years ago • Complex board: analog and digital in one (noise!) • Output: skewclear (CFEB)  fiber (DCFEB) • DCFEB upgrade forces upgrade of TMB and DMB

  10. Trigger in High Eta • Momentum resolution determined by nearest station • Trigger stub finding efficiency: • Green – default CSC trigger • Red – tune current TMB to include high eta • At higher rate pulls down efficiency in the bulk (ME-1b) • Independent of DCFEB issue, TMB mezzanine needs replacement • Current FPGA full

  11. Strips: 1 16 17 32 33 48 … … … Electronics Channel 1 … Channel 16 High Eta: ME1/1 Unganging • High-h section of ME1/1 • Cathode strips are currently ganged 3:1 • Challenge for CSC TF: • Even with a new TMB a triple ambiguity • Increased combinatorics, larger rate if try all three • Need to ungang ME-1a • Couple with CFEB upgrade: 5 CFEBs 7 DCFEBs

  12. MPC and CSCTF • Main challenge is higher rate of stubs at higher luminosity • CSCTF: needs more power and more links to handle higher rate of input stubs • MPC: remove a bottleneck limit on the number of LCTs (now 3) • Think of lepton jets from dark photons or NMSSM Higgs Falls under the trigger group roof, but important for this discussion

  13. Bringing Everything Together • Q: Is the specific ordering important?

  14. Bringing the Team Together • Very productive meeting at Ohio State last week: • Focus on electronics related issues • A detailed plan developed including a schedule of first prototypes • E.g. DCFEB in Fall (OSU), TMB this Summer (TAMU) • Loopback , fiber, memory testing (Rice, UCLA, OSU, TAMU) • Division of labor: • Radiation hardness tests for SEUs (NEU, UF) • Interesting possibilities for new groups coming onboard, as well as backup scenarios planning

  15. Schedule Scenario I • In this scenario, bulk of the upgrades in 2015 • Can we do better physics sooner? Maybe…

  16. Alternative Scenarios • Q: What does it give us?

  17. Benefits of Early TMB Upgrade • Robust LCT triggering up to h=2.4 • Remember: current TMB was never designed to go beyond 2.1 even for LHC luminosity • Continuing triggering at high eta will cause large inefficiency in h=1.6 to 2.4 • Could be 5% (using prompt-only PU50 as an estimate), could be to more (50% for prompt PU400) • No reason not to upgrade MPC and CSC TF at the same time

  18. Requirements • Backwards compatibility • Copper connections for old CFEBs • Fiber inputs available for new dCFEBs • Easy upgrade installation • Swap mezzanine cards • Replace TMB front panels • New panel allows dCFEB fiber connector • Can install one crate (9 boards) at a time, ~2 crates per day • Forward compatibility: • New DCFEBs: plug in fibers and update the TMB firmware

  19. Ongoing Feasibility Studies • Feasibility studies by no means complete yet • Working on new mezzanine prototype (J. Gilmore) • Schematic and layout work in progress • A prototype planned to be made this summer • SNAP-12 fiber components on order • All other parts (FPGAs, etc) are in hand • Use Xilinx XC6VLX195T-2FFG1156CES • Start backward compatibility tests • Current firmware being ported to Virtex-6 by UCLA • New firmware soon, TAMU is documenting the algorithm • Technical issues being studied: • Heat distribution(regulator test board) • Power (e.g. LV could need modifications), radiation hardness tests later • Production costs are estimated at $400k

  20. Credits for Stolen Slides • J. Hauser et al (UCLA) • D. Acosta, I. Furic, A. Madorsky (Florida) • B. Bylsma, S. Durkin (OSU) • P. Padley, M. Matveev (Rice) • J. Gilmore, V. Khotilovich, I. Suarez (TAMU)

  21. Summary • Plan of CSC upgrades well established: • Shortcomings of the current system are well understood and have been studied in detail using simulation • Solutions has been proposed and tested in simulation • Schedule has been re-synced with the machine plans and better analysis of available resources • Additional resources are being identified including via new institutions coming onboard • Planning includes more efficient separation of labor and closer collaboration on common tasks • New options are being considered aiming at improving detector and quality of data well before 2015

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