EVOLUTION AND APPLICATIONS OF SYSTEM ON A CHIP SPACEWIRE COMPONENTS FOR SPACEBORNE MISSIONS

1. EVOLUTION AND APPLICATIONS OF SYSTEM ON A CHIP SPACEWIRE COMPONENTS FOR SPACEBORNE MISSIONS Joseph R. Marshall 5 November 2008 – International SpaceWire Conference

2. SpaceWire Components and their Applications • SpaceWire ASIC • Mini-RF Control Processor and Software • SpaceWire Evaluation Board and Usage • Next Generation SpaceWire ASICs

3. 4 Port SpaceWire ASIC Block Diagram and Features PCI 2.2 SRAM DMA SOC Combined GSFC’s SpaceWire Core with BAE’s Core-Based Bridge ASIC

4. LRO Command and Data Handling (C&DH) / Spacecraft Architecture SpaceWire ASIC Key to LRO SpaceWire Network

5. Mini-RF Processor-Centric View MINI-RF Other Mini-RF Slices RAD750 Control Processor in Mini-RF Payload used SpaceWire for external interface and high speed internal interfaces Serial Peripheral Interface Temperature Monitors Discrete Controls & Status SpaceWire Other LRO Elements Control Processor Slice External Power SpaceWire

6. 28V Power SpaceWire Port A J01 28V Return (15) SpaceWire Port B J04 - 7 SpaceWire Port C (4x9) SpaceWire Port D SPI + 2 Disc + Gnd J02 (37) SPI + 2 Disc + Gnd RAD750 Control Processor RAD750 COP/JTAG 8 Temp Sense CPU JTAG J03 2 Discretes + Gnd SpaceWire JTAG (51) P08 2 Discretes + Gnd RS422 UART (51) Boot Discretes 2 Discretes + Gnd Control & Status Control Processor Interfaces Four SpaceWire ports are used to perform all high speed interfacing

7. Mini-RF RAD750 Control Processor Block Diagram Mini-RF Processor Board Leveraged elements from several previous processor designs including LRO SBC

8. Control Processor Slice Isometric Views SpaceWire Connectors Control Processor Self-Contained within a stackable Slice with all connections by cable

9. Internal Software Structure Mini-RF Payload software Self-contained on Slice in PROM and EEPROM Built mostly from existing software modules

10. SpaceWire Evaluation Board Block Diagram A subset of the LRO SBC (and Mini-RF Processor), the SpaceWire Evaluation Board provides a Low Cost Breadboard for space applications

11. SpaceWire ASIC Evaluation Board Photos Easily fit on a 6U-160 CompactPCI board, The SpaceWire Evaluation Board plugs into standard COTS Backplanes

12. SpaceWire Port 1 SpaceWire Port 5 SpaceWire Port 6 SpaceWire Port 7 SpaceWire Port 8 SpaceWire Port 2 SpaceWire Port 9 SpaceWire Port 3 SpaceWire Port 10 SpaceWire Port 4 JTAG Multi-Port Router from SpaceWire Evaluation Boards SpaceWire Port SpaceWire ASIC Eval Bd 3 SpaceWire ASIC Eval Bd 1 SpaceWire Port 14 SpaceWire Port SpaceWire Port 15 SpaceWire Port 16 SpaceWire Port 12 PCI Bus PCI Bus SpaceWire ASIC Eval Bd 4 SpaceWire ASIC Eval Bd 2 PCI Bus PCI Bus SpaceWire Port 11 SpaceWire Port 13 PCI Bus SpaceWire Port RAD750 Evaluation Board PCI Bus Multiple Evaluation Boards may be combined to breadboard router Performance with more oorts than a single ASIC

13. Next Generation ASIC Block Diagram Integrates SpaceWire with RAD750 Interfaces

14. RAD6000MC ASIC block diagram Integrates SpaceWire with Embedded RAD6000

15. Core-Based ASIC Evolution Continuing Evolution of Core-Based ASICs for Processing Applications

16. Summary • BAE System’s 4 Port SpaceWire ASIC, a core based system on a chip, is a key component of the LRO SBC and Mini-RF Payload • The Mini-RF Control Processor utilizes SpaceWire for C&DH communications and high performance control of the Mini-RF Payload • Software is self-contained and was built on full set of SpaceWire and RAD750 building blocks • Evaluation Board has been developed that may be used to breadboard SpaceWire applications using the SpaceWire ASIC • SpaceWire cores being combined with RAD750 and RAD6000 families for highest performance processing and standalone instrument applications as part of evolution of our system on a chip devices

17. Questions? Joe.Marshall@BAESystems.com