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Finite State Machines (automata) Hybrid and uncertain system. Vít Fábera. Finite State Machine. is a mathematical model of behaviour of system element examples of usage: digital system design the first step of design process is to create an FSM model programming
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Finite State Machines(automata)Hybrid and uncertain system Vít Fábera
Finite State Machine • is a mathematical model of behaviour of system element • examples of usage: • digital system design • the first step of design process is to create an FSM model • programming • an FSM is a model of some parts of sw, for example lexical analyzer in compilers
control systems • the behaviour of control algorithms can be described by an automaton model A note: • many synthesis tools (that generate for example skeletons of control software in C, VHDL codes etc.) use an FSM model as its input • contain a drawing tool for transition diagrams
a FSM is a behavioral model of elements with discrete inputs, discrete outputs and with a memory ie. the present output of FSM depends on the present value of input variables Xtand on the previous value of input variables Xt-1 • the algorithm how to create a specific FSM does not exist; it a creative activity of a designer (circuit designer, programmer,…)
Definition The finite state machineis a six-tuple where X... input alphabet (a finite set of input symbols) Y... output alphabet (a finite set of output symbols) Q... a finite set of internal states ... transition function, XQ Q ... output function, XQ Y Q0 Q...the initial state
Notes: • sometimes, the FSM is defined as a five-tuple without the initial state • it is not very useful in practice because we usually want to define the initial state (then the behavioral is deterministic) • internal state = "memory" of input symbol history • the output function assigns an output symbol on the base of present state and present input, it means present input an history
the transition function determines a new internal states on the base of present state and present input, it the FSM calcultates its new own piece of input history • there are two types of FSM having different output function • Mealy FSM :XQ Y • Moore FSM :Q Y • the both type are equivalent and mutually convertible
Other types of FSMs • Medvedev'sFSM • it has no set of output symbols and no output function;we monitor only a sequence of internal states which the FSM traverses (transducer) • example: lexical analyzer • Autonomous FSM • there is no set of input symbols • the transition function has a form : Q Q, it means Qt+1 = (Qt) • example: a model of autonomous counters
Other types of FSMs • Stochastic FSM • transitions are defined with probability • Fuzzy FSM • transition and output functions are defined with help of fuzzy operators (intersection) • states, input, output are fuzzy sets
Representation of FSMs • transition graph • oriented graphs • vertices = states, edges = transitions • Moore FSM • edges labeling: inputs - transition conditions • vertices labeling: outputs • Mealy FSM • edges labeling : inputs - transition conditions and outputs • transition and output table
An example of Moore FSM • a hypotetical FSM which is not a model of a specific element (but it can be) • X,Y,Qset are symbolic
An Example of Moore FSM X = {X1,X2}, Y = {Y0, Y1, Y2}, Q = {Q0, Q1, Q2} transitions outputs
An Example of Mealy FSM transitions outputs
Sequentialmapping • the sequential mapping is a alternative behavioral description of automata (it maps input sequence to the output sequence): input sequence output sequence
Properties of sequential mapping The sequential mapping has to: • hold the length of sequence • the output sequence has the same length as the input sequence • hold the leading subsequece • if two input sequencesξ1 andξ2have the same leading (!) subsequences of the length k > 0 thenthe leading output subsequencesof the length at least k must be the same.
And now two practical examples • three ones from hardware domain • two ones from software domain
Example 1 Design a FSM model of synchronous digital sequential circuit which transforms an input impulse of arbitrary length to the output inpulse of the length of one clock period. in other worlds: input sequence: 0111101000001110 output sequence: 0010000100000100
we create a Moore FSM (experience) 1. Input and output symbol sets are given by the problem and the are clear: X = {0,1} Y = {0,1} 2. Internal state set andfunctions and are not given - we construct them
1 0 Q1/1 Q0/0 Q = {Q0, Q1, Q2} • the initial internal state: Q0 0 1 0 Q2/0 1
Equivalent Mealy FSM 1/1 1/0 0/0 Q1 Q0 0/0 input sequence: 0111101000001110 output sequence: 0100001000001000 If the Moore FSM is realized with synchronous circuit then the output sequence can be shifted againstthe FSMis a Mealy one (see this case).
0 1 Y Q0 Q0 Q1 0 Q1 Q0 Q2 1 Q2 Q0 Q2 0 A FSM described by tables
for interest: • a sequential synchronous logic circuit constructed according to designed Moore FSM: • internal statesQ0, Q1, Q2are represented be binary numbers 00,01,10 (two bitsq1q0) andthey are stored in registers 74LS74 (flip-flops)
Example 2 Construct a FSM that controls pumps filling a water reservoir. The reservoir has three sensors of water level: h2, h1 and h0. Water can be emitted by water cock, the reservoir is filled by two pumps. If the sensor is under the surface of water its output is a logical 1. The pump is switched on by logical 1. If the water surface is over h2 or between h2 and h1 (drops) the pumps are off. If the surface drops under h1, the first pump is activated and the pump works until the reservoir is full. If the discharge from reservoir is strong and the surface drops under h0, the second pump is activated. The both pump work until the reservoir is full. If two pumps work together the velocity of inflow is bigger than the velocity of outflow. Faults of sensors are not considered.
input symbol set X = {111, 011, 001, 000} (bits are states of sensorsh2, h1 a h0) • output symbol set Y = {00, 01, 11}
Moore FSM of control unit Mealy FSM of control unit
Example 3 Design an automaton model of circuit that controls ATX power supply switching on/off. The input of the circuit is a button signal (pushed button = log. 1), the output is a signal controlling switching transistor (supply on = log. 1). After the button is pushed the supply is switched on. If the button is released the supply is still on. The next press means the switching off: if the button is hold at least 4 sec., the supply is switched off, if the button is released before the supply stays on. Note: Elapsed time 4 sec. is measured by counter. The counter has 1 input signalenable (log. 1 = counting enable, log. 0 = stop and reset). The counter has 1 output signaltop (log. 1 if the time 4 sec. elapsed).
Vcc ATX Power Supply button x o Control circuit Counter Vcc enable top FSM o x
FSM Description • input and output labeling agreement 00/00 x top enable o Note: 1x/00 - the transition and output does not depend on the input signal top (x = don’t care)
Moore FSM 0x 1x Q1/10 1x Q0/00 0x Q2/10 0x 0x 00 01 1x Q3/11 Q4/00 10 11 1x
Mealy FSM 0x/00 1x/10 Q1 1x/10 Q0 0x/10 0x/00 01/00 00/10 Q2 Q3 10/11 11/00 1x/00
Example 4 Lexical elements (in programming languages) are constants, variables, operators etc. There are three types of constants in C/C++ programming language – decimal,octal,hexadecimal. The constant starting with 1 ... 9 is decimal, the constant starting with 0 is octal and the number starting with 0x (or 0X) is hexadecimal. Example: • decimal: 12, 25, 95 • octal: 05, 0123 • hexadicimal: 0x2F, 0X11 Construct a FSM (transducer) that recognizes if the number is decimal, octal or hexadecimal.
constructed FSM has no output function; it accepts an input sequence and we find out the final step
Example 5 We write a console application calculation. The application has one mandatory parameter (number) and two optional switches –p and –l. The order of optional switches is not given. The –p switch is followed by two numbers, the first one is stored to the variable a, the second one to the variable b. The –l switch is followed by a text – file name that is stored to the variable file. Boolean variables pp, resp. pl are set to true, if the switches –p, resp. –l, are present. For example: calculation 20–p 1.5 2 calculation 5 –l text.txt calculation 1 –l print.txt –p 10.5 4.5
Construct a FSM model of a part of the application which analyzes switches. Idea of solving: • the internal state of FSM "says" which input element is waited (switch, number, text) • output is represented by assigns command (actions) • we will construct a Mealy FSM
End -/- num / b=num Switch text –p /pp=true Num1 num/a= num Num2 text or - / error „Switch –p must be followed by number“ text –l / pl=true text / file=text other text /error „Switch –p or –l is expected“ text or - / error „Switch –p must be followed by 2 numbers“ FileN Error -/error „Switch –l must be followed by file name“
how to implement an FSM by software: • internal state is stored in variable (integer or enumerate data type) • the transitions are implemented by cycle witch switch (case) command in its body
state = Switch; while(not Stop) { case stateof Switch: ifinput=“-p” then begin state=Num1; pp = true; end; ifinput=“-l” then begin state=FileN; pl = true; end; etc. Num1: ifis_number(input)=true then begin state=Num2; a = num(vstup); end; etc.
Application in C language i=2; // index of the first optional parameter state = SWITCH; // initial state while(i<argc && state != ERROR) { switch(state) { caseSWITCH: if(strcmp(argv[i],"-p")==0) {state=NUM1; pp=1;} elseif(strcmp(argv[i],"-l")==0) { state=FILEN; pl = 1; } else { printf("The switch –p or –l is expected\n"); state = ERROR; continue; } break; caseNUM1: if(sscanf(argv[i],"%f",&a)<1) { printf("The switch –p must be followed by number\n"); state = ERROR; continue; } state = NUM2; break; caseNUM2: if(sscanf(argv[i],"%f",&b)<1) { printf("The switch –p must be followed by 2 numbers\n"); state = ERROR; continue; } state = SWITCH; break; caseFILEN: file_name = argv[i]; state = SWITCH;break; } i++; // shift to next parameter } if (state != SWITCH || state == ERROR) printf("Error in switches.\n");
Cooperative FSMs Example: • producer-consumer work with shared memory of size 1 Byte • a producer stores data to the shared memory if it is empty • a consumer reads data from the shared memory if it is full
Cooperative FSMs Consumer Shared memory Producer memory states memory states Q0 Q0 Q0 / empty empty/- full/- Q1 Q1 Q1 / full write x read x emty/ write x full/ read x operation operation Q2 Q2
Stochastic FSM • stochastic FSM is a six-tuple FSMS = (X, Y, Q, M, N, q0), where X... a finite set of input symbols Y... a finite set of output symbols Q... a finite set of internal states M ... a matrix of transition probabilities N ... a matrix of output probabilities q0… an initial state
Matrix of transition probabilities • the element pij(a) of M(a) matrixdetermines probability of transition from the state i to the state j if the input symbol is a Example: Q = {A, B, C}, X = {0, 1}, Y = {a, b}, q0 = [1,0,0]
Matrices • elements of matrices must obtain tj. the row-sum have to be equal to 1
Using • the simulation of stochastic systems • the modeling of Markov's processes • the syntactic analysis of stochastic languages (recognition)
Corresponding stochastic FSM 0,6 0,4 0,8 no rain rain 0,2
Fuzzy FSMs • a fuzzy FSMis a system based on relations FFSM = <X, Y, Q, T, R, q0>, kde X... a finite set of input symbols Y... a finite set of output symbols Q... a finite set of internal states T ... transitional fuzzy relation R ... output fuzzy relation q0… a fuzzy subset of Q (fuzzy initial state)
Fuzzy FSM • letXt, Yt, Spt, Snt+1be fuzzy setsrelated to the input symbol, output symbol, present and nextstate: • evidently Sp0 = q0 a Spt+1 = Snt • Tis a fuzzy relationamong [X] [SP] [SN] • R is a fuzzy relationamong[SP] [Y], resp. [X] [SP] [Y]
Transitions and outputs • the output fuzzy set is determined by max – min composition • the ternary fuzzy relation T is convertedto the binaryone