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FECC/SAIOC/RTEMS

FECC/SAIOC/RTEMS. Making Lemonade. “Slow” Code (in PC) Ported iRMX code By Bob Sass and Tony As little hand work as possible EPICS OSI layer Dual NIC Regular Feedback/Pnet Coexists with SAIOC Uses SAIOC core functions Receives PNET via Ethernet

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FECC/SAIOC/RTEMS

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  1. FECC/SAIOC/RTEMS Making Lemonade

  2. “Slow” Code (in PC) Ported iRMX code By Bob Sass and Tony As little hand work as possible EPICS OSI layer Dual NIC Regular Feedback/Pnet Coexists with SAIOC Uses SAIOC core functions Receives PNET via Ethernet Point-to-Point fiber serial connection to FECC Fast (new HW) PPC embedded in FPGA fabric IP only (no TCP/UDP) Fast (NMI) code Does BPM data Receives PNET via fast link Proprietary RTS No debugging capability Drives several busses SLAC CAMAC Standard CAMAC Bitbus FECC

  3. FECC • Work by Sass, Gromme, Siskind • Target date June 2006 • PC side has PCIL serial link driver • Driver useable by ported iRMX and EPICS • Feedback to run in PC • Feedback to use UDP instead of KISNET • Replaces multibus & micro

  4. Current Micro Setup SLCNET to VMS PNET broadcast Multibus crate With Multibus Format Intel CPU CAMAC Branch Driver Camac Camac

  5. FECC Setup Ethernet to VMS PNET broadcast (Ethernet) PC running in MCC Point-to-point fiber serial link FECC Running Camac control And BPM acq. Camac Camac Standard Camac Bitbus

  6. Software Division RTEMS or Linux PC iRMX Multibus Micro “Slow” Message Database Magnet Stat Anlg The ethernet PNET broadcast means there are hard realtime requirements “Slow” Message Database Magnet Stat Anlg FECC Driver + PCI card Camac commands PNET, BPM Fast BPM, Timing (360 Hz int) Fast BPM, Timing (360 Hz int) FECC

  7. SLC-Aware IOC (SAIOC) • EPICS OSI as basis • SLC part looks like micro • EPICS part does I/O • EPICS part is separable from SLC part • Only BSAC (BPM) and Magnet support • All analog/digital in EPICS only • Used as basis for FECC iRMX port

  8. SLC-Aware IOC Ethernet communication to VMS Modified SLC-style Messaging Database Task dispatching Pure EPICS Implementation Communicating With rest of VME Crate and hardware This code uses the EPICS OSI implementation. It is currently developed on a linux platform and run on RTEMS in a VME crate. It is designed such that VMS sees this aggregate as a micro but that it can run as an EPICS-only implementation later

  9. SLC-Aware IOC with FECC This runs in A PC, just like The pure FECC Idea. System is Linux or RTEMS. Ethernet communication to VMS Modified SLC-style Messaging Database Task dispatching Pure EPICS Implementation Communicating With Hardware By sharing the FECC driver with iRMX Add EPICS record support for camac addressing via FECC E Port of rest of iRMX Code. Camac branch FECC Driver

  10. FECC-PC to EPICS migration • One driver for FECC works for both EPICS and ported iRMX code • FECC-PC is a modified SAIOC • Only fast part remains BPMs • Treat FECC as CAMAC fieldbus for EPICS • Add EPICS support for FECC • Move Analog/digital/etc. to SAIOC style • Or just move analogs/digitals/etc to EPICS

  11. Where does this lead? • EPICS can slowly take over all functionality • FECC becomes CAMAC fieldbus only • PCs running RTEMS allow slow migration to EPICS • Application migration is totally separate

  12. FECC MPG • Old MPG uses PNET, no Ethernet capability • FECC MPG will broadcast over Ethernet • MPS Supervisor is Ethernet; has shared memory with old MPG • SAIOC PNET card receives PNET broadcast; could rebroadcast on Ethernet • The BIC talks to the MPG via shared memory too • The Bitbus support capability of the FECC can be (trivially) modified to support PNET.

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