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Jinna Yan Nanyang Technological University Singapore

LOW POWER MILLIMETER WAVE ACTIVE SIGE SUB-HARMONIC UP-CONVERSION MIXER WITH ULTRA LOW DRIVING POWER. Jinna Yan Nanyang Technological University Singapore. Agenda. Introduction System Architecture Literature Review Design of Up-conversion Mixer -- Schematic -- Layout

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Jinna Yan Nanyang Technological University Singapore

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  1. LOW POWER MILLIMETER WAVE ACTIVE SIGE SUB-HARMONIC UP-CONVERSION MIXER WITH ULTRA LOW DRIVING POWER Jinna Yan Nanyang Technological University Singapore

  2. Agenda • Introduction • System Architecture • Literature Review • Design of Up-conversion Mixer -- Schematic -- Layout -- Post-layout simulation results • Conclusion

  3. Introduction • Why 60GHz? • Unprecedented amount of spectrum -- Spectral efficiency not a dominant constraint -- 2GHz bandwidth per channel • License free -- Few regulatory specifications • Small wavelength -- Multi-antenna ideal for small form factor devices

  4. Introduction-cont.. • Targeted Application: -- Wireless personal area networks -- Short range <10m -- High data rate >2Gbps • System requirements: -- Highly integrated, low cost -- Small in size -- Low power

  5. System Architecture • Sub-harmonic up conversion using sliding IF topology • LO operating at a relatively lower frequency, alleviates the design for synthesizer • IF signals has a bandwidth greater than 10GHz centered at 12GHz • LO signal bandwidth of 3.5GHz at 24GHz

  6. Literature Review I: Ref: A Frequency Tripler Using a Subharmonic Mixer and Fundamental Cancellation • Topology: -- Fully differential sub-harmonic core mixer -- Three transistor architecture

  7. Literature Review II: • Topology: --Double balanced Gilbert mixer -- mHEMT FET technology -- Chip area 3mmX 3mm Ref: 60 GHz MMIC double balanced Gilbert mixer in mHEMT technology with integrated RF, LO, and IF baluns

  8. Schematic of Designed Up-conversion Mixer

  9. Features of Designed Up-conversion Mixer • RF output signal has a bandwidth of 11GHz • Use of two transistor topology to reduce voltage supply requirement • Pesudo-differential LO core • Designed CPW transmission lines load

  10. Schematic of Common Emitter Buffer

  11. Layout of Up-conversion Mixer Core & Buffer • Process: -- Jazz Semiconductor -- 0.18µm SiGe BiCMOS -- High ft of 200GHz • Chip size: -- 0.88mmX 0.78mm (inc. pads)

  12. Sparameters @ IF and LO Ports

  13. Conversion Gain vs. LO Power

  14. Gain Flatness vs. RF Output Frequency

  15. Voltage Conversion Gain vs. IF Input Signal Power

  16. Output Frequency Spectrum

  17. Overall Specification • Power consumption (Mixer Core): 1.7mA @ 1.8V • Max. Gain: -0.1dB • RF output 3dB gain flatness: 59GHz ~ 70GHz • Input referred P1dB: -12.3dBm • LO power drive requirements: -14dBm • Spur suppression: >20dBc

  18. Conclusion • A low power active sub-harmonic mixer has been designed for the 60GHz SOC • It provides a elegant solution to upconvert low frequency signals without a high frequency VCO • Features achieved include high bandwidth, high linearity and low LO drive power levels

  19. Thank youQ & A

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