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ECE 667 Spring 2011 Synthesis and Verification of Digital Circuits

ECE 667 - Synthesis

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ECE 667 Spring 2011 Synthesis and Verification of Digital Circuits

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    1. 1 ECE 667 Spring 2011 Synthesis and Verification of Digital Circuits Scheduling Algorithms Analytical approach - ILP

    2. ECE 667 - Synthesis & Verification - Lecture 5 2 Scheduling a Combinatorial Optimization Problem NP-complete Problem Optimal solutions for special cases and for ILP Integer linear program (ILP) Branch and bound Heuristics iterative Improvements, constructive Various versions of the problem Minimum latency, unconstrained (ASAP) Latency-constrained scheduling (ALAP) Minimum latency under resource constraints (ML-RC) Minimum resource schedule under latency constraint (MR-LC) If all resources are identical, problem is reduced to multiprocessor scheduling (Hus algorithm) In general, minimum latency multiprocessor problem is intractable under resource constraint Under certain constraints (G(VE) is a tree), greedy algorithm gives optimum solution

    3. ECE 667 - Synthesis & Verification - Lecture 5 3 Integer Linear Programming (ILP) Given: integer-valued matrix Am x n variables: x = ( x1, x2, , xn )T constants: b = ( b1, b2, , bm )T and c = ( c1, c2, , cn )T Minimize: cT x subject to: A x ? b x = ( x1, x2, , xn ) is an integer-valued vector If all variables are continuous, the problem is called linear (LP) Problem is called Integer LP (ILP) if some variables x are integer special case: 0,1 (binary) ILP

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