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Explore Application-Specific Codesign for Platform Generation in Cyber-Physical Systems using FPGA-based Real-Time Digital Mockups. Learn about simulating complex environments, testing cyber-physical devices, and achieving flexibility in your designs. Discover how hardware-in-loop testing can enhance your development process.
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Application-Specific Codesign Platform Generation for Digital Mockups in Cyber-Physical Systems Bailey Miller *, Frank Vahid *†, Tony Givargis † *Dept. Computer Science & Engineering University of California, Riverside {bmiller,vahid}@cs.ucr.edu †Center for Embedded Computer Systems University of California, Irvine givargis@uci.edu This work is supported by the National Science Foundation (CNS1016792) and Semiconductor Research Corporation (GRC 2143.001)
Testing Cyber-Physical Devices • It is difficult to test the broad range of environmental conditions for cyber-physical devices • Medical devices like ventilators require extensive testing to pass FDA regulations Bailey Miller, UC Riverside 1/20
Testing via a physical mockup • Simulate complex environment with mechanical analog Bailey Miller, UC Riverside 2/20
Testing via a digital mockup • Simulate complex environment with a mathematical model • Models can simulate dangerous, expensive, or difficult to reproduce scenarios • More accurate than mechanical methods Bailey Miller, UC Riverside 3/20
Hardware-in-loop testing • Hardware-in-loop not new • HiL implementations are ad-hoc and fractured • Hanson, et. al. hardware in loop simulation of cardiovascular system device testing [Medical Engineering and Physics, 2007] • Steurer, PEBB based high-power hardware-in-loop simulation facility for electric power systems • Cai, Design and implementation of a hardware-in-the-loop simulation system for small-scale UAV helicopters. • etc… Bailey Miller, UC Riverside
Digital mockup models • Large systems of Ordinary Differential Equations (ODEs) *Gas exchange model: Lutchen et. al. Bailey Miller, UC Riverside 4/20
Models in real-time? • Complex models often not real-time 16,493 13,880 11 generation branching Weibel model (4094 ODEs) Bailey Miller, UC Riverside 5/20
FPGA P1 P2 … P3 … … Real-time using FPGAs • FPGAs match model characteristics • Fine-grain parallelism • Local communication Bailey Miller, UC Riverside 6/20
Gas exchange model Processor Processor Model A (1 KHz) Model B (10 Hz) coproc coproc Respiratory mechanics model Digital mockup framework - requirements • A. Flexibility • B. Multi-timing support • C. Co-design Support Bailey Miller, UC Riverside 7/20
Digital Mockup (FPGA) Digital mockup framework Interface registers Cyber-physical device Device Interface Actuator Models Environment Model Actuator Sensor Processing core Sensor Models Transducer Bypass – Sirowy, et. al. [International Conference of the IEEE Engineering in Medicine and Biology‘09] Bailey Miller, UC Riverside 8/20
Digital Mockup (FPGA) Digital mockup framework- example • 1. Device software generates command for actuator Interface registers Cyber-physical device Device Interface Actuator Models Environment Model Actuator Sensor Processing core Sensor Models Bailey Miller, UC Riverside 9/20
Digital Mockup (FPGA) Digital mockup framework- example • 2. Device interface intercepts command Interface registers Cyber-physical device Device Interface Actuator Models Environment Model Actuator Sensor Processing core Sensor Models Bailey Miller, UC Riverside 10/20
Digital Mockup (FPGA) Digital mockup framework- example • 3. Actuator model acts on command • Outputs of the actuator are registered Interface registers Cyber-physical device Device Interface Actuator Models Environment Model Actuator Sensor Processing core Sensor Models Bailey Miller, UC Riverside 11/20
Digital Mockup (FPGA) Digital mockup framework- example • 4. The environment model obtains registered actuator outputs and continues to advance model state with new input. Outputs of environment model are registered. Interface registers Cyber-physical device Device Interface Actuator Models Environment Model Actuator Sensor Processing core Sensor Models Bailey Miller, UC Riverside 12/20
Digital Mockup (FPGA) Digital mockup framework- example • 5. Sensor models obtain registered outputs of environment model Interface registers Cyber-physical device Device Interface Actuator Models Environment Model Actuator Sensor Processing core Sensor Models Bailey Miller, UC Riverside 13/20
Digital Mockup (FPGA) Digital mockup framework- example • 6. Device interface packages and sends sensor readings to cyber-physical device processing core Interface registers Cyber-physical device Device Interface Actuator Models Environment Model Actuator Sensor Processing core Sensor Models Bailey Miller, UC Riverside 14/20
Digital Mockup (FPGA) Digital mockupflexibility • Models map to one or more processors • API for implementing models • step(), getSample(), setOutput() void Step() { //airway mechanics model Q = GetSample(FLOW_ADDR); Pv += (Q/Ct-Pv/((Rl+Rt)*Ct) + Pl/((Rl+Rt)*Ct )) *dt; Pc = Pv*(Rl/(Rt+Rl))+Pl*(Rt/(Rl+Rt)); Pl += (Pv/(Cl*(Rl+Rt))-Pl/(Cl*(Rl+Rt)))*dt; SetOutput(PRESSURE_ADDR,Pc); } Interface registers Cyber-physical device Device Interface Actuator Model (proc 1) Environment Model (proc 3) Actuator Sensor void Step() { //Gas exchange model Q = GetSample(FLOW_ADDR); F = (Q-Pl)/R; Vl += F*dt; dVl/DPl += C*dt; C_lung = Q_lung/Vl; k = ln(Vmax/Vmin)/a; Q_lung = C_air + (C_lung-C_air)*exp(-k*t); SetOutput(PRESSURE_ADDR,Pc); SetOutput(CONCENTRATION_ADDR, Q_lung); … } Processing core Sensor Model (proc 2) Bailey Miller, UC Riverside 15/20
Digital Mockup (FPGA) Digital mockupmulti-timing support • Models may be solved at different time steps • Models need not be synchronized • Update interface registers after each time step to ensure up-to-date data is available Interface registers Device Interface Actuator Model Environment Model Sensor Model Bailey Miller, UC Riverside 16/20
Digital Mockup (FPGA) coproc StepCoProcessor: process(clock_i) begin case state is when ‘0’ => step_done_o <= ‘0’; if (step_i = ‘1’) then state <= ‘1’; end if; when ‘1’ => model_start <= ‘1’; --model omitted for brevity if (model_done=’1’) then step_done_o <= ‘1’; end if; end case; end process; ReadCoprocessor: process(read_enable_i) if (read_enable=’1’) then case address_i is when “00000000” => data_o <= pressure_register; when “00000001” => data_o <= weibel_gen0_volume; … end case; end if; end process; WriteCoprocessor: process(write_enable_i) if (write_enable=’1’) then case address_i is when “00000001” => flow_register <= data_i; … end case; end if; end process; Digital mockupco-design support • 3. Co-design Support Step() { //processor hosts interface to coproc WriteCoprocessor(COPROCESSOR_FLOW_ADDR, getSample(FLOW_ADDR)); StepCoprocessor(); SetOutput(ReadCoProcessor(PRESSURE_ADDR)); } Device Interface Actuator Model Environment Model Sensor Model Environment Model Coprocessor controller Bailey Miller, UC Riverside 17/20
~~~~~~~~~ ~~~~~~~~~ ~~~~~~~~~ Digital mockup generator tool • Automatically generates templates for digital mockup framework • Select platform type, transducer information, enable coprocessor support, etc. C++, VHDL templates Bailey Miller, UC Riverside 18/20
Digital mockup generator tool • Generated digital mockup using tool • Initially, simple model implemented (3 ODEs) on processor only • ~2 hours to build new digital mockup test setup • Swapped simple lung model with bifurcating model (100+ ODEs) for enhanced accuracy. • < 5 minutes to perform swap (cut/paste operation and adding of coprocessor C++ interface code.) Bailey Miller, UC Riverside 19/20
Conclusions • Digital Mockups enhance testing of cyber-physical device software • FPGAs allow complex physiological models to run in real-time • Proposed framework and tool to guide design of digital mockup test setups • Supports model flexibility and co-design capability • Shortens time spent on testing of cyber-physical devices • Promotes clean and consistent digital mockup implementations Cyber-physical device Digital mockup (FPGA) Lung model Ventilator Satellite orbital physics Heart model Pacemaker Bailey Miller, UC Riverside 20/20