170 likes | 279 Views
EPICS in digital front-end feed back loops ...first steps. Victor Ionu ţ Stoica KVI (NUSTAR Controls). JSI. FPGA fast process. ADC. Detector. Supplies. CPU slow process & controls interface. Basic approach front-end digitizing systems controls. EPICS controls.
E N D
EPICS in digital front-end feed back loops ...first steps Victor Ionuţ Stoica KVI (NUSTAR Controls) JSI
FPGA fast process ADC Detector Supplies CPU slow process & controls interface Basic approach front-end digitizing systems controls EPICS controls
Loop constituents can be: • VME • Embedded system • … • Fast and realtime analysis algorithms (e.g. base line follower)
capable of following a slowly fluctuating baseline • reports current baseline value to the calorimetry function • follows noise level of baseline (variance σ2) • higher single-point signal-to-noise ratio • trigger level expressed in σ2 of the baseline fluctuation • immune to baseline pulling by the occurrence of a pulse Base line follower/trigger Masters Thesis KVI/JSI of Julia Jungman
Loop constituents can be: • VME • Embedded system • … • Fast and realtime analysis algorithms (e.g. base line follower) • Slow process and integration in control systems
EPICS is … EPICS is a set of Open Source software tools, libraries and applications developed collaboratively and used worldwide to create distributed soft real-time control systems for scientific instruments such as a particle accelerators, telescopes and other large scientific experiments.
It works like this… Channel Access Client Channel Access Client Channel Access Client Channel Access Client Channel Access Server Process Variables: Power Supply Computer Interface S1A:H1:CurrentAO S1:P1:x S1:P1:y S1:G1:vacuum Beam Position Monitor Computer Interface Vacuum Gauge Computer Interface
What is ‘Device Support’? • Interface between record and hardware • A set of routines for record support to call • The record type determines the required set of routines • These routines have full read/write access to any record field • Determines synchronous/asynchronous nature of record • Performs record I/O • Provides interrupt handling mechanism
Loop constituents can be: VME Embedded system … • Fast and realtime analysis algorithms (e.g. base line follower) • Slow process and integration in control systems • Automatic startup, optimization and calibration, monitoring
Detector Quad ADC board HV
KVI Quad ADC's card • Resolution : 14 bits (ADS5541) • Speed : 100 MSamples/s • Bandwidth : 50 MHz • Input range : -4 to 4 Volt • Input connector : SMA • Input impedance : 50 Ohm • External trigger inputs : 4*SMA • External trigger input impedance : 50 Ohm • Power supply : 5Volt from TRB Next steep is to move to VME boards
HV EPICS interface maybe Submitted to EPICS collaboration : http://www.aps.anl.gov/epics/modules/contact.php#Victor%20Stoica
Implementing the self adjusting loop Read/Write from EPICS Databases Read/Write Read/Write • Access to all process variables • Managing multiple databases in the same time