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This class lecture covers topics on diodes, including the ideal diode, physical operation of diodes, the SPICE diode model, and propagation delay in inverters. It also includes home work problems.
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Diodes 2
Home Work No. 2 (Due May 2, 2007) • Problem 1.24 • Problem 1.30 • Problem 1.35 • Problem 1.86
In This Class We Will Discuss Following Topics: Chap 3 Diodes 3.1 The Ideal Diode 3.7 Physical Operation of Diodes 3.9 The SPICE Diode Model
1.7.7 Propagation Delay • Inverters are Characterized in Terms of The Time Delay Between Switching of vI (Low to High) and Corresponding Change Appearing at the Output • 2 Reasons for Propagation Delay: • Transistors (Switches) Exhibit Finite (nonzero) Switching Time • The Cap needs to Charge/Discharge before Output Change • To Analyze Inverter Switching Need to Understand Time Response of Single-Time-Constant Ckts (STC) [Appendix D]
Step Function Applied to an STC Network with Time Constant τ, Out putat any time: y(t) = Y∞ - ( Y∞ - Y0+)e-t/τ Y∞is final value where response is heading Y0+value of response immediately after t=0 • Output at any time t is difference between final value and gap whose initial value is Y∞ - Y0+and shrinking exponentially
Example 1.6 Before t=0 vI is high, and VOL is = Voffset + V in Ron At t=0 SW opens, V across Cap cannot change instantaneously, therefore at t=0+ O/P is still 0.55. Cap charges thru R and vO rises exponentially toward VDD
Using vO(∞) = 5 V and vO(0+) = 0.55V in Eq. y(t) = Y∞ - ( Y∞ - Y0+ )e -t/τ vO(t) = 5 – (5 – 0.55) e-t/τ τ = RC. To find tPLH tPLH ≡ 0.5 (VOH + VOL) vO(tPLH) = 0.5(5+0.55) tPLH = 0.69τ = 0.69RC = 0.69x1000x10-11 = 6.9 ns
Diode • The Simplest and Most Fundamental Non-Linear Ckt Element • Like Resistor, Diode has Two Terminals • Unlike Resistor Diode has Non-Linear I-V Characteristics • To Understand Diode Function We Start with a FICTITUOS Element – Ideal Diode • Then Physical Operation which will be Foundation for Understanding FETs BJTs
3.1 The Ideal Diode Two Terminal Device with The Symbol Positive Terminal Anode and Negative Cathode And I-V Characteristics as:
When Negative Voltage is Applied (Reverse Biased), No Current Flows and Diode behaves as Open Circuit and Said to be Cut Off or OFF When Positive Voltage is Applied (Forward Biased), Zero Votage Drop Appears and Diode behaves as Short Circuit Circuit and Said to be Turned On or ON
External Circuit Must be Designed to Limit Forward Current and Reverse Voltage to Predetermined Safe Value
The I-V of Ideal Diode is Highly non-linear, but it contains two Straight-Line Segments 90° to one Another – Piecewise Linear. Application in Which Signal on Device Terminal Swing only Along one-linear portion then Device is Linear for that Application
3.1.2 The Rectifier Fundamental Application of Diode which makes use of its severely non-linear I-V curve is Rectification
3.1.2Diode Logic Gates Diodes together with Resistors can be used to implement Digital Logic OR Gate, Y=A+B+C AND Gate, Y=A.B.C
3.7 Physical Operation of Diode • A semiconductor diode is basically a pn junction – p-type semiconductor material brought into close contact with n-type material (practically n and p regions in Si) • Terminals -- wire connections are made through metal (Al) contacts to n and p regions • Besides being Diode, pn junction is the basic element of BJTs and plays an important role in the operation of FETs
Intrinsic Silicon Two-dimensional Silicon Crystal, Circles represent the silicon atoms, with +4 positive charge neutralized by the charge of the four valence electrons. Covalent bonds are formed by sharing of the valence electrons. At 0 K, all bonds are intact and no free electrons are available for current conduction.
Intrinsic Silicon At room temperature some bonds are broken by thermal ionization and some electrons are free. Bond breaks, Electron leaves parent atom leaving behind +ve charge (hole). Electron from neighboring atom moves to fill hole creating another hole. Essentially, by repetition of the process, positive charge (hole) is moving thru crystal and available for conduction.
Intrinsic Silicon • Equal number of Electrons and Holes Result by Thermal Ionization (Generation of Electron/Hole Pair EHP) • While moving randomly these pairs recombine and disappear as well (Recombination) • Recombination Rate is Proportional to number of free Electrons and Holes, which in turn is determined by Ionization Rate • Generation is Strong Function of Temperature • In Thermal Equilibrium Recombination is equal to Generation and Concentration of e/h can be calculated: n = p = ni and ni is free electrons or holes concentration in Intrinsic Silicon at a given T
Intrinsic Silicon • At an absolute temp T (in Kelvin) the Where B = 5.4x1031 (for Si), k is Boltzmann’s constant and EG Band gap energy (1.12 eV for Si) is minimum energy required to break a bond for EHP generation • At 300 K (RT) the Eq. gives ni = 1.5x1010 carriers/cm3 for Intrinsic Si • Note that Si has about 5x1022 atoms/cm3, So at room temp only One of every Billion atom is ionized !!
Diffusion and Drift • Diffusion and Drift – Two mechanisms by which Holes and Electrons move thru Si • Diffusion of carriers takes place if Concentration Gradient is present and Gives rise to Net Flow of Charge (Current) • Hole Diffusion Current in x-direction: Magnitude is Proportional to Slope of Concentration Gradient
Diffusion and Drift (Contd…) • Similarly Electron Diffusion Current • In Semiconductors, Carrier also move through another mechanism – Drift • Carrier Drift Occurs when Electric Field is Applied Across a Piece of Si • Carriers are Accelerated by the E Field and Acquire Drift Velocity (Holes drift in E direction and Electrons opposite)
Diffusion and Drift (Contd…) • Hole Drift Current through a Si with hole density p as a result of E Field applied is: • Similarly, Electron Drift Current is: • Total Drift Current will be sum of both: • Note that this is a form of Ohm’s law, resistivety in ohm-cm is given by:
Diffusion and Drift (Contd…) • Finally, a simple relationship between diffusivity and mobility exist, know as Einstein Relationship: • VT is known as Thermal Voltage = 25 mV at RT
Doped Semiconductors • In Intrinsic Si the Holes and Electrons have equal Concentration and strongly dependent on temperature • While in Doped Semiconductors Carriers of one kind (either hole or electron) are predominant • Doped silicon in which majority of charge carriers are negatively charged electrons is called n-type • With majority of +ve holes is p-type
Doped Semiconductors (Contd…) • Doping of Si to make it n or p type is achieved by introducing small number of impurity atoms • Introducing impurity atoms of pentavalent element such as P results in n-type Si • Each P atom replacing Si atom is donating a free electron to Si Crystal • Note that for free electron no hole is generated, hence majority of charge carriers in P doped silicon are electrons
Silicon Crystal Doped By a Pentavalent Element. Each Dopant Atom Donates a Free Electron and is Thus Called a Donor. The Doped Semiconductor Becomes n Type.
Doped Semiconductors (Contd…) • If the Donor Atom (P) concentration is ND in thermal equilibrium the free electron concentration in n-type Si is nno will be: • In Thermal equilibrium the product of electron and hole concentration remains constant, that is, nn0pn0 = ni2 • Concentration of holes would be, • Minority holes are function of Temp while Majority Electrons are independent of Temp.
Doped Semiconductors (Contd…) Similarly When Silicon Crystal Doped with a Trivalent Impurity Boron, Each dopant atom gives rise to a hole, and the Semiconductor becomes p type.
Doped Semiconductors (Contd…) • Introducing impurity atoms of Trivalent element such as B results in p-type Si • Each B atom replacing Si atom is accepting a free electron from Si Crystal to form a covalent bond, thus each B atom gives rise to Hole • Note that for Hole no electron is generated, hence majority of charge carriers in B doped silicon are Holes
Doped Semiconductors (Contd…) • If the Donor Atom (B) concentration is NA in thermal equilibrium the free Hole concentration in p-type Si is pp0 will be: • In Thermal equilibrium the product of electron and hole concentration remains constant, that is, np0pp0 = ni2 • Concentration of Electrons would be, • Minority Electrons are function of Temp while Majority Holes are independent of Temp.
3.7.2 pn Junction Under Open Circuit Conditions The pn junction with no applied voltage (open-circuited terminals) + denote majority holes in p-type - denote majority electron in n-type Minority carriers in both sides are not shown
Diffusion Current ID: Because Hole concentration is high in p region and low in n region, holes diffuse to n region, likewise, electrons diffuse to p region, giving rise to Diffusion Current ID from p to n side
Depletion Region: The Electrons that diffuse from n region to p region leave behind + charged donor atoms in n region near junction. In p region electron recombine with holes and create – charge on Acceptor Atoms in p region near junction. Thus the area near junction becomes depleted of free electrons and holes on both sides and a net bound charges are established.
The Carrier Depletion Region or Depletion Region is also called Space Charge Region Charge on both sides cause an Electric Field to be established and hence a potential difference results across depletion region as shown Thus the Electric Field opposes any further diffusion of carriers, in fact, voltage drop V0 across depletion region acts as barrier for carriers. Larger the barrier smaller number of carrier will be able to diffuse. ID strongly depends on V0.
Drift Current Is and Equilibrium A current component due to minority-carrier drift also exist across the junction. Some thermally generated holes in n region diffuse to the edge of depletion region where they experience E Field and are swept across junction to p region. Same for electrons in p region. These two add together to form drift current Is from n to p side Is is independent of V0 and strongly dependent on Temp
Under open-circuit no external current exists, thus, two opposite currents across junction should be equal, ID = IS. • This Equilibrium condition is maintained by V0 • If ID exceeds IS it will result creating more bound charges on both sides, widening the depletion region, and increase V0. This in turn will cause ID to decrease until equilibrium is reached
The Junction Built-In Voltage • The V0 across pn junction is given by: • Typically for Si at RT, V0 is in the range of 0.6 V to 0.8 V • The voltage measured between pn junction terminals is zero, this is because the contact voltages existing at the metal-semiconductor junctions at diode terminals exactly balance the barrier voltage.
Width of Depletion Region • Usually the doping levels on both sides are not equal hence the depletion region is not same on both sides • In order to cover same amount of charge the deletion region will extend deeper in lightly doped material • If xp is width of depletion region in p side and xn is in n side for equal charges on both sides, qxpANA = qxnAND • Or
3.7.3 Reverse-Bias Conditions Excite pn junction with constant current source I in reverse direction I < IS. I in ckt will be carried by Electrons Flowing from n to p Free Electrons leave n and Holes leave p region Results in more – and + charges to build at junction – increase width of depletion region and voltage across it, causing ID to reduce, IS constant In Steady state (equilibrium) IS – ID = I The increase in Voltage above V0 will appear at diode terminals as Reverse Voltage VR
Depletion Layer Capacitance Just like Capacitor when V changes the Charge changes Charge on either side of junction Is equal, so using n side: qJ = qn = qNDxnA In terms of depletion-layer width, Wdep And Wdep is given by Combing both eqs gives for non-linear qJ-VR and is plotted above
Depletion Layer Capacitance This is not a linear capacitor Using Small Signal Approx. Depletion-capacitance is Slope at bias point Q: Alternatively, we can treat depletion layer as parallel plate capacitor, Cj = εA / Wdep
The pn Junction in Reverse Breakdown Region The pn junction excited by a reverse-current source I > IS. The junction breaks down, and a voltage VZ , with the polarity indicated, develops across the junction.
3.7.5 Forward Bias Condition Excite pn junction with constant current source I in forward direction Supply Free Electrons to n and Holes to p region. Results: Neutralize – and + charges at junction – decrease width of depletion region and voltage across it, causing ID to increase, IS constant In Steady state (equilibrium) ID – IS = I The Voltage V0 decrease by Forward Voltage V This cause Holes injection in n and Electrons Injection in p regions
Minority-carrier distribution in a forward-biased pn junction (NA >ND). In Steady state excess minority carrier profile remains constant. This distribution gives rise to increase of Diffusion current ID above IS as these carriers diffuse and disappear by recombination and equal number is replenished by external circuit
Current-Voltage Relationship Consider the current component caused by holes injected in n region. Concentration of minority carriers at the edge of Depletion Region is: Hole distribution in n region is: Where The hole diffusion current in n region at xn is:
Current-Voltage Relationship Similarly the Electron diffusion current in p region at - xp is: Since both Jp and Jn are in same direction they can be added and multiplied by A to get total current;
Diffusion Capacitance • FB junction in steady state has certain amount of excess-carrier charge stored in each p and n bulk region • If terminal voltage changes this charge has to change before new steady state is achieved • This gives rise to another capacitive effect • The charge stored due to excess minority-carrier holes in n region:
