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Dive into the intricacies of computer architecture with Dr. Khaled El-Ayat. Understand complex problems, explore hi-tech advancements, and learn the inner workings of CPUs, memory hierarchy, and more. Prerequisite knowledge in logic fundamentals and programming languages is required. Experience the evolution of microprocessors, from CMP to multicore technology, shaping computing devices from laptops to autonomous vehicles. Explore the tradeoffs in technology, programming languages, and applications in computer architecture.
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CSCE330 Computer Architectureanything complex needs an architecture Dr. Khaled El-Ayat
أنا إن قدر الإله مماتىّنه لا ترى الشرق يرفع الرأس بعدىإننى حرة كسرت قيودىرغم أنف العدا وقطعت قيدىمصر التى فى خاطرى وفى دمى أحبها من كل روحى ودمى ٣٠/٦/٢٠١٣ ١٥/١١/١١ الشيخ عماد عفت ١٥/١١/١١ علاء عبد الهادى ٢٥/١/١١
Course--Overview • “See the forest from the trees” • there are passengers .. And there are drivers”? • https://www.youtube.com/watch?v=VDwMhSobaOgSkylake • Intel’s skylake
Course Goals • “See the forest from the trees” How to view “complex” problems • Hi-tech drives the world eg 1 • https://www.youtube.com/watch?v=VDwMhSobaOgSkylake • Robots replacing humans https://www.youtube.com/watch?v=bD-UPoLMoXw • Appreciate iphone 6 !!!
Multicore Goal: Get you to understand
Course--Overview“See the forest from the trees” • Technology + Needs Computer Architecture • Review: MIPS -, CISC vs. RISC .; simple ALU • Performance Computer Arithmetic, ALU CLA (Appendix C5,6) [Lab] • CPU Datapath and Control - Performance (Chapter 4) [Lab] in Verilog • Pipelining (Chapter 4) [CPU simulator project] • Memory Hierarchy: Cache, virtual memory (Chapter 5) • Advanced Pipelining, Multiprocessing, Multi-core technology
Prerequisite Knowledge • CSCE 231, Logic Fundamentals; CSCE 230 • write C# / C++/Java programs for project • NOTE: Must take CSCE 339 this semester!!
Computing Devices Now Set-top boxes Sensor Nets Games Airbus Cameras Media Players Honda’sAsimo Servers Routers Laptops Smart phones Supercomputers Automobiles
Google Driverless + Benz, Audi, Toyota, GM, Ford, … • Self drive -Autonomous." • technologies > autonomous driving: • radar, video cameras and lasers. • Logged 1M miles testing Autonomous driving law adopted in Nevada • Driverless taxis, trucks, …
Optical Mouse in action Optical mice illuminate work surface with LED, to reveal microscopic pattern of highlights and shadows. Patterns are reflected onto navigation sensor, which takes pictures at a rate of 1500 images per second.
Optical Mouse Image processing The Navigation Engine identifies common features in sequential images to determine the direction and amount of mouse movement. Image B was taken while the mouse was moving, a short time after image A. It shows the same features as image A, only shifted down& to the left.
Internet Routingyour message goes thru hundreds of routers, undersea cables,. Internet ? http://static.howstuffworks.com/flash/router-inet.swf Routing http://static.howstuffworks.com/flash/router-lan.swf 216.27.61.137 IP address
Parallel computing, security, … Domain of recent computer architecture (‘90s) Reliability, power, … Reinvigoration of computer architecture, mid-2000s onward. Architecture:: Abstraction Layers in Modern Systems Application Algorithm Programming Language Operating System/Virtual Machine Instruction Set Architecture (ISA) Microarchitecture Gates/Register-Transfer Level (RTL) Circuits Devices Physics
Review: How Computer Handles Code temp = v[k];v[k] = v[k+1];v[k+1] = temp;lw $15, 0($2)lw $16, 4($2)sw $16, 0($2)sw $15, 4($2)00000000101000010000000000011000.......(MIPS binary machine program) High level language program Compiler Assembly language program Assembler Machine language program
Instruction Set Architecture • Interface b/w the hardware & lowest level softwareincludes anything a programmer needs to know to make a binary machine language work • An implementation: hardware that obeys the architecture abstract • An architecture can have several different implementations • Modern instruction set architectures: • 80x86/Core duo, Power (IBM), MIPS, SPARC, HP Application software system software Hardware
MIPS R3000 Instruction Set Architecture Registers R0 - R31 • Instruction Categories • Load/Store • Computational • Jump and Branch • Floating Point • Memory Management • Special • Addressing Modes PC HI LO 3 Instruction Formats: all 32 bits wide OP rs rd sa funct rt OP rs rt immediate jump target OP MIPS used this semester to explain architecture
Computer Architecture Tradeoffs Technology Programming Languages Applications Cleverness Computer Architecture Operating Systems Power History
Silicon ingot Blank wafers Slicer 20 to 30 processing steps Tested Individual dies Patterned wafers dies (one wafer) Die Dicer tester Packaged dies Tested packaged dies Ship to customers Manufacturing: your Core Duo $$ Modern IC Fab = $4B
Evolution of Microprocessors CMP –Chip Multiprocessors a.k.a Multicore exist since 2001; Now mainstream – laptops, servers, smartphones, ..
NASA mainframe in 1969 Moon landing less powerful than today’s PC