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VME64x Digital Acquisition Board Architecture (DAB64x). Stratix FPGA. VME. Sync. SRAM. Timing. Clock. 12-bit Mezzanine. 12-bit Mezzanine. Main Features FPGA Core: Altera Stratix EP1S10… EP1S40F780 Synchronous SRAM: 3 blocks of 128K…2M 32/36
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VME64x Digital Acquisition Board Architecture (DAB64x) Stratix FPGA VME Sync. SRAM Timing Clock 12-bit Mezzanine 12-bit Mezzanine • Main Features • FPGA Core: Altera Stratix EP1S10… EP1S40F780 • Synchronous SRAM: 3 blocks of 128K…2M 32/36 • 2 12 bits Mezzanine Boards for specific acquisition functions • VME Access: D32/A32 or D64/A64 • Timing and Acquisition Clock management JL Gonzalez
VME64x Digital Acquisition Board (TRIUMF-DAB64x) • Designed to handle 2 channels of 12-bit 40MHz Data • Will be used for LTI and LHC beam position system; SPS, LTI and LHC fast beam intensity measurements and LHC beam loss system JL Gonzalez
P0 - Connector JL Gonzalez
Main Devices - Stratix EP1S… • Altera FPGA: Stratix Overview: 1.5 V - 780-Pin FineLine BGA • The pin out compatibility of these devices allows for different board implementations and makes the DAB64x a very versatile module • Associated memory estimated costs: • 3 128K 32: 12 EUR • 3 2M 36: 420 EUR JL Gonzalez
Boundary Scan Test JTAG Controller PC • During production, this test should prevent mounting or soldering errors Power Supplies Test Setup BS Device P1 P0 P2 Scan Bridge SCANSTA111 Other BS Devices Aux. Mezzanine Aux. Mezzanine DAB64x JL Gonzalez
DAB Production Schedule • History • DAB64x specs finalised in January 2003 • FPGA – ALTERA Stratix • 30 DABIII cards needed for in 2004 • Production and testing will be done at CERN • 2004 • Order of main components • Tender for most expensive parts • Spring 2004: production of 3 BPM-type and 2 BLM-type prototypes (Daryl Bishop). • Tests at CERN (Daryl) • Tender for full production • Autumn 2004: pre-series production (35 modules) • 2005 • Full production • Tests at CERN • Installation JL Gonzalez