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WBS 6.4 LAr Calorimeter System

WBS 6.4 LAr Calorimeter System. John Parsons Hong Ma Level-2 Manager Level-2 Deputy Columbia University Brookhaven National Lab U.S. ATLAS HL-LHC Upgrade Director’s Review Brookhaven National Laboratory Upton, New York May 14-16, 2019.

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WBS 6.4 LAr Calorimeter System

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  1. WBS 6.4 LAr Calorimeter System John Parsons Hong Ma Level-2 Manager Level-2 Deputy Columbia University Brookhaven National Lab U.S. ATLAS HL-LHC Upgrade Director’s Review Brookhaven National Laboratory Upton, New York May 14-16, 2019

  2. Outline • Technical Overview • System Overview: Changes from Current System • Motivation for Upgrade: Technical and Physics • Proposed U.S. HL-LHC Upgrade Scope • Ongoing R&D: Plans, Decisions, Technical Readiness • Key Performance Parameters & Technical Specifications • Construction Project Management • Work Breakdown Structure and Contributing Institutes • International Partners • ES&H • Cost, Schedule and Risk • Budget and Schedule • Risk, Uncertainty, and Contingency • Quality Assurance and Project End-game • Closing Remarks Director's Review, May 14-16, 2019, BNL

  3. Technical Overview

  4. ATLAS Calorimeter System Calorimeters not being changed; Upgrade focuses on electronics Director's Review, May 14-16, 2019, BNL

  5. Current LAr Readout System Some specifications • Max. L1 rate = 100 kHz • Max. L1 latency = 2.5 s • L1 Trigger granularity Upgrade plans • Phase 1 – upgrade trigger • HL-LHC – upgrade readout On-detector (FE) Off-detector (BE) Director's Review, May 14-16, 2019, BNL

  6. LAr Upgrade Path and Motivation • As instantaneous luminosity increases, becomes increasingly difficult to trigger on desired signal events, in presence of large backgrounds from both in-time and out-of-time pileup • Particularly problematic for L1 trigger, which has no tracking information, as well as tight constraints including: • Maximum L1 rate = 100 kHz • Maximum L1 latency = 2.5 s • In addition, current L1 system sums typically 60 channels to form L1 Trigger Towers (TT) of granularity of (and no longitudinal segmentation), providing limited discrimination between e/ objects and jets • Without upgrade, would need to raise trigger thresholds, with subsequent loss in physics potential • To maintain ability to trigger on low pT objects, need to provide more and better information at earlier trigger levels • In Phase 1, as intermediate step, LAr upgrades L1 trigger to provide somewhat finer granularity (10 “SuperCells” per TT) • LAr HL-LHC upgrade builds on Phase 1 concepts, to provide full granularity, full precision readout at 40 MHz bunch crossing frequency Director's Review, May 14-16, 2019, BNL

  7. HL-LHC Upgrade of LAr Electronics Motivation • LAr calorimeter is a critical subsystem for many (in fact, most) HL-LHC physics goals • Particularly true for signatures involving electrons, photons, jets, MET • For example (see next slide), H  critical for precision Higgs studies, and for measuring di-Higgs production (thereby testing form of Higgs potential) • Current LAr readout satisfies specifications for original ATLAS detector • Examples include: L1 rate < 100 kHz, L1 latency < 2.5 μs • The HL-LHC TDAQ architecture adopted to meet the needs of the HL-LHC phase has specifications which are much more stringent • Examples include: L0 trigger rate up to 1 MHz or even possibly up to 4 MHz, L1 trigger rate up to 400 kHz, L0/L1 latencies up to 10 μs/60 μs • To be compatible with HL-LHC TDAQ architecture, MUST replace all LAr readout electronics, both on-detector frontend (FE) and off-detector backend (BE) Director's Review, May 14-16, 2019, BNL

  8. Example of Physics Impact:H  • H  mass resolution is critical to HL-LHC Higgs and di-Higgs studies • Finding small, narrow diphoton mass peak on top of large background  sets stringent requirements on photon reconstruction and energy resolution • A motivation to cover 16-bit dynamic range on FEB2 with two 14-bit gain scales is that intercalibrating the three 12-bit gain scales of the current FEB is a significant systematic uncertainty on precision of Higgs mass value Director's Review, May 14-16, 2019, BNL

  9. Readout Architecture for HL-LHC • Read out full detector at 40 MHz • No pipeline on detector LASP FEB2 Boxes in BLUE are new for HL-LHC Director's Review, May 14-16, 2019, BNL

  10. US Scope for HL-LHC LAr Upgrade Key ADC+Optics 6.4.1 PA/Shaper 6.4.5 BE 6.4.3 System Integration 6.4.4 FEB2 6.4.2 DOE Scope NSF Scope Director's Review, May 14-16, 2019, BNL

  11. DOE and NSF Scope • LAr is only subsystem in HL-LHC upgrade project with bothDOEand NSF scope • All LAr scope is managed together and uniformly at L2 DOE Scope • Two WBS L3 areas, which depend critically on specialized expertise and infrastructure available at BNL • 6.4.4 System Integration – Profiting from BNL expertise and infrastructure, leveraging similar work done in original construction and for Phase 1 upgrade • 6.4.5 Preamp/Shaper ASIC - Profiting from expertise of BNL Instrumentation expertise (going all the way back to the invention of LAr calorimetry… up through original ATLAS construction) NSF Scope • Strong university teams playing leading roles in: • 6.4.1 FE Electronics (ADC ASIC and Optical links) • 6.4.2 FEB2 • 6.4.3 BE Electronics • The boundaries between DOE and NSF scope are well-delineated and clear Director's Review, May 14-16, 2019, BNL

  12. DOE Scope: LAr System Integration • WBS 6.4.4 covers “System Integration” task at BNL • Work involved includes: • Frontend Crate System Test, performed to validate the FE system integration and overall performance before PRRs of the various FE crate boards (including FEB2, LTDB, CALIB) • Final analog calibration and QA/QC tests of 50% of the production FEB2 boards • Integration and combined system test of FE and BE electronics • Re-use the BNL FE crate mockup used to perform the equivalent tests during the original ATLAS construction and Phase 1 upgrade Director's Review, May 14-16, 2019, BNL

  13. DOE Scope: LAr PA/Shaper ASIC • WBS 6.4.5 covers development, prototyping and production at BNL (in collaboration with French) of custom ASIC that combines functionalities of Preamplifier and Shaper • PA/Shaper ASIC is a critical component for achieving the overall analog performance • Requirements for preamp include • 16-bit dynamic range • Programmable impedance (25 Ohm and 50 Ohm) to match different sections and signal cables of LAr calorimeter • Maximum current of 2 mA for 50 Ohm input and 10mA for 25 Ohm input • Requirements for shaper include • 2 different gains, with differential outputs • ENI in high gain of less than 100 nA (200 nA) for preamplifier versions with 50 Ohm (25 Ohm) input impedance • ASIC must also form analog “super cell” sums for use by the LTDB, as part of the HL-LHC Level 0 trigger Director's Review, May 14-16, 2019, BNL

  14. R&D Strategy • R&D efforts informed by previous experience on original ATLAS construction and Phase 1 upgrade • The R&D effort on the LAr DOE scope has been focused so far on the Preamp/Shaper ASIC, which has a long development time • System Integration effort also now ramping up, as Analog Testboard (first step toward FEB2 integration) becomes available • PA/Shaper ASIC (6.4.5) • Given challenging analog performance requirements (eg. 16-bit dynamic range), shared work with LAL/OMEGA (France) to investigate multiple technologies • Initial CMOS efforts of US (BNL [+ U Penn]) on 65 nm and French on 130 nm • First pre-prototypes looked promising for both technologies • Discussions within collaboration between BNL and French led to decision at BNL workshop in April 2018 (confirmed by Steering Group during June 2018 LAr week) to use 130 nm CMOS • Planning updated accordingly (see details in Hong’s talk later) Director's Review, May 14-16, 2019, BNL

  15. R&D Results and Plans • PA/S plan includes development cycle with approx. annual chip submission • 3 Pre-prototype cycles, then Prototype and then Production • Need for additional iteration included in Risk Register • After first pre-prototype round, investigating both 65 nm and 130 nm CMOS, technology down-select made to focus on 130 nm CMOS • Collaboration of BNL + French led to submission of two versions of Pre-prototype 2, LAUROC1 in Oct. 2018 and ALFEv0 in Nov. 2018, with different preamp designs • Common testbench developed by BNL being used in both US and France to test both chips • Next step is shared design and summer 2019 submission of Pre-prototype 3 • More details in L3 talk by Hong Ma Director's Review, May 14-16, 2019, BNL

  16. Key Performance Parameters Threshold KPP Objective KPP (a) Develop, produce and deliver to Columbia University one half of  the multi-channel preamp-shaper ASICs to be mounted on the liquid argon  front-end boards (FEB2), which perform according to ATLAS specifications. (b) Contribute to system integration of the liquid argon front-end boards (FEB2) and back-end electronics. (c) Prepare for the installation of the liquid argon front-end system in the ATLAS Collision Hall. (a) Develop, produce, test and deliver to Columbia University one half of the multi-channel preamp-shaper ASICs to be mounted on the liquid argon front-end boards (FEB2), which perform according to ATLAS specifications. (b) Perform system integration of the liquid argon front-end boards (FEB2), back-end electronics and TDAQ systems. (c) Participate in the installation and commissioning of the liquid argon front-end system in the ATLAS Collision Hall. Director's Review, May 14-16, 2019, BNL

  17. Technical Specifications (docdb #216) CQ.2 • 6.4.4 System Integration (CAM H. Xu, BNL) • Front-end system integration will validate FEB2 design in the LAr FE crate test, which includes FEB2, Calibration Board, LTDB, baseplane and back-end electronics. FE crate test will serve as a milestone and test results will be used in the FEB2 PRR. Front-end test stand will be used to perform production QA/QC test of 806 FEB2 boards before they are delivered to CERN. Back-end system integration will validate LASP design in the LAr BE crate test, which includes LASP and interface to front-end FEB2. BE crate test will serve as a milestone and test results will be used in the LASP PRR. Back-end test stand will be used to perform full chain integration, from FEB2 to LASP, and to FELIX of TDAQ system. • 6.4.5 Preamp/Shaper ASIC (CAM H. Ma, BNL) • 4-channel preamp/shaper ASIC. Each channel has a preamplifier to cover 16-bit dynamic range, following by shaper in 2 different gains with differential outputs. Each ASIC has 1 summing output, to form super cell signals to LTDB. ASIC has programmable impedance (25 Ohm and 50 Ohm) to match different sections of LAr Calorimeter, programmable peaking time and programmable termination to optimize the response. ENI in high gain is less than 100 nA for 50 Ohm input and less than 200 nA for 25 Ohm input. Maximum current is 2 mA for 50 Ohm input and 10mA for 25 Ohm input. Covered in more detail in L3 talks Director's Review, May 14-16, 2019, BNL

  18. Brief Summary of Project Management, and Cost, Schedule, Risk Given time constraints, give here a few highlights. More details will be presented and discussed in the Breakout sessions.

  19. WBS and Management Structure NSF DOE Director's Review, May 14-16, 2019, BNL

  20. ES&H (docdb #2) CQ.6 • Safety is of the highest priority within the Project • Work at each institute adheres strictly to its ES&H policies • The BNL ES&H Liaison (Lori Stiegler) provides oversight and advice • US ATLAS HL-LHC Institute Contacts act as interfaces between their institute and BNL and CERN • Main Hazards for this L2 system • Electrical hazards (shock, fire) • Material handling and rigging (eg. forklift operation) • Chemicals (for cleaning, etc.) • Radiation: Radiation tests of electronics performed at certified facilities • All work done in compliance with safety policies at the institute or CERN, or at the radiation facility (eg. Massachussetts General Hospital) Director's Review, May 14-16, 2019, BNL

  21. Total Cost Profile (per L3) • DOE scope dominated by manpower requirements • Due (largely) to nature of System Integration work Total Cost = $6,128k Director's Review, May 14-16, 2019, BNL

  22. Total Cost by Resource Category Director's Review, May 14-16, 2019, BNL

  23. FTE Profile by Resource Category • Uncosted scientific labor should be 0.4 FTE (0.2 FTE for Hong as L2 Deputy and another 0.2 FTE for his L3 role for 6.4.5) – will be corrected Director's Review, May 14-16, 2019, BNL

  24. Overview of Schedule • 6.4.4 System Integration • FE Integration must deliver fully qualified FEB2 boards to CERN on time for installation • BE Integration work at BNL not so directly tied to installation at CERN • 6.4.5 Preamp/Shaper ASIC • Need to provide fully qualified ASICs on time to Columbia for use in FEB2 assembly Director's Review, May 14-16, 2019, BNL

  25. Summary of Main Risks • 6.4.4 System Integration • Main risks due to possible delays in delivery of the various custom boards required for the FE and BE system tests • Start integration as early as possible (eg. already with Analog Testboard for FEB2) • System Engineering very important to closely follow the various board developments, and work to keep integration schedule on track • 6.4.5 Preamp/Shaper • Several risks were tied to 65 nm vs 130 nm technology down-select, and possible shared submission with (NSF scope) ADC ASIC • These have been retired and/or realized, now that decision to use 130 nm for PA/shaper • Increases some DOE costs since must now pay for submission, but 50% cost sharing with French labs reduces impact • A couple months float, and increased schedule flexibility, realized by removing synch with ADC • Remaining risks related to external dependence on French, to possible need for additional iteration, or to lower than expected yield • More details in Hong’s and Hao’s L3 talks Director's Review, May 14-16, 2019, BNL

  26. Results of Risk/Uncertainty Analysis • Overall, 90% CL cost is 20.6% above baseline estimate • We are still working to check in detail these numbers • The available float in the current schedule is 179 working days (~9 mo.), driven by FEB2 production and testing schedule, while the analysis shows schedule of 207 working days at 90% CL • We could create additional float by having more manpower and/or test setups at BNL to speed up PA/S and FEB2 production QA/QC testing, should it prove necessary Director's Review, May 14-16, 2019, BNL

  27. QA/QC • QA/QC is critical to both System Integration and PA/Shaper tasks • First version of QA/QC documents has been prepared for both • System Integration • Planning based on similar tasks performed at BNL for original FEB (and very recently for LTDB board of the Phase 1 upgrade) • Preamp/Shaper • Planning based on similar tasks performed at BNL for preamp hybrid of original FEB • Specifications Review was held in Jan. 2019, providing key input to parameters to be measured, acceptance windows, etc. • Discussions ongoing with French about developing automatic (ie. robotic) testing system • As for original constructions, measured parameters for all ASICs will be stored and archived in “Production Electronics Database” Director's Review, May 14-16, 2019, BNL

  28. Closing Remarks • DOE is playing central role in LAr HL-LHC upgrade, with leading roles in key deliverables • 6.4.4 System Integration • 6.4.5 Preamp/Shaper ASIC • These deliverables were carefully chosen to leverage the unique expertise and infrastructure at BNL, as well as to maintain clear and well-delineated boundaries between the DOE and NSF scope • Extensive PA/Shaper R&D program is well underway to be ready for start of full prototyping in 2020, followed by production • System Integration effort is ramping up, now that FEB2 integration is getting underway (with production of Analog Testboard) • US ATLAS deliverables (both DOE and NSF) for HL-LHC LAr follow directly from, and leverage, our expertise and experience from the original ATLAS construction project and the ATLAS Phase 1 Upgrade project • Experienced team that is fully engaged, with all key personnel identified • This experience also provides us with confidence in the budget and effort estimates Director's Review, May 14-16, 2019, BNL

  29. BACKUP

  30. Bio Sketch of L2 Manager John Parsons (Professor of Physics, Columbia University) • ATLAS roles include: • Since 1994, Team Leader of Columbia University ATLAS group • Since 12/2014, US ATLAS Level-2 Manager for LAr HL-LHC Upgrade • 4/2010 – 2/2017, US ATLAS Level-2 Manager for LAr Maintenance & Operations • Leader of Columbia Univ. group that developed and produced the Front End Board (FEB) of the current LAr calorimeter readout, as well as 5 custom ASICs • During original ATLAS construction, served for 5 years (‘03 – ‘08) as : • Member of ATLAS Executive Board and ATLAS Technical Management Board • LAr Electronics Coordinator • Member of ~10-person LArMgmt Group and ~20-person LAr Steering Group • Served for 6 yrs (‘97 – ‘03) as Co-Convenor of ATLAS Top Quark physics working group, and as member of ~20-person ATLAS Physics Coordination Board • Previous experiments (and technical/management roles) include: • DZero (‘00 – ’10, LAr trigger electronics), SSC (‘91 – ’93, Leader of GEM LAr electronics), ZEUS (‘90 – ’99, Calorimeter readout electronics), ARGUS (‘85 – ’90, Microvtx detector) Director's Review, May 14-16, 2019, BNL

  31. Bio Sketch of L2 Deputy Manager Hong Ma • At Brookhaven National Lab since 1989 • Omega Group Leader, PI for BNL ATLAS research program, 2008-2016 • Physics Department Chair, 2016 - current • Experiences in ATLAS • Member of ATLAS Since 1994 • Responsible for preamp production test in ATLAS construction • ATLAS LAr Software and Data Preparation Co-coordinator, and member of ATLAS LAr Management Group, 2008-2016 • US ATLAS Operations Program LAr R&D Manager 2015-2016 • Other experiences • LAr/LKr calorimeter R&D for SSC detectors, SSC Fellow early 1990’s • AGS E865 Experiment for rare kaon decays, 1993-2000 Director's Review, May 14-16, 2019, BNL

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