Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design

Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design Course and contest Results of Phase 4 Nam Pham Van

Design comparison P ~ A Power: P = (Pdyn * Pleak) Area: A  Reduction of the area  lower the power consumption

Design & architecture • RCA  small area  low power consumption • Improve speed with Carry Skip architecture

Design & architecture optimization • Adder Reduction: • 10 bit  8 bit • 11 bit  10 bit • 16 bit  13 bit • Influences: • Minimized switch activity • Reduced area & power consumption

Cadenceconfiguration Setting Effect • Netlist optimization • Design optimization • Higher frequency are possible • Power consumption raised immense • Antenna fixing • Eco route • Wire optimization • No impact • Other gate libraries • Higher frequency are possible • Extreme high leakage power consumption

Cadenceconfiguration • Best settings: • Core Ratio H/W: 1 • Core Utilization: 90 • IO Boundary: 15 • Power Ring: • Width: 2 • Spacing: 0.5 • Offset: 2 • COREHVTtyp10V

Results of ASIC design

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Spezielle Anwendungen des VLSI – Entwurfs Applied VLSI design