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Hardware-in-the-Loop Testbed

Hardware-in-the-Loop Testbed. Team 186. Project Collaborators. Team Members: Aaron Eaddy – EE Ken Gobin – EE/COMPE Douglas Pence – ENGR PHYS/EE Team Advisor/Sponsor: Sung Yeul Park – Assistant Professor. Outline. Background Components: Microcontroller Interface circuit

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Hardware-in-the-Loop Testbed

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  1. Hardware-in-the-Loop Testbed Team 186

  2. Project Collaborators • Team Members: • Aaron Eaddy– EE • Ken Gobin – EE/COMPE • Douglas Pence – ENGR PHYS/EE • Team Advisor/Sponsor: • Sung Yeul Park – Assistant Professor

  3. Outline • Background • Components: • Microcontroller • Interface circuit • Sensor circuits • Design Updates • Circuitry • Timeline • Budget

  4. Background • Hardware-in-the-Loop: • A simulation technique that is used in the development and testing of complex real-time embedded system designs. • Benefits: • Function tests are able to be done at an early stage of development. • Laboratory tests are cheaper, more flexible and highly controllable. • No potential major risk of physically damaging test failures. • Tests are easy to reproduce and provide highly consistent results. • Improve battery operation and monitoring • State of Health • State of Charge • Remaining useful life • Voltage, current, and temperature

  5. Components

  6. Design Updates Initial Design: • TI ezDSP® F28335 • 6 data/address lines, 59 GPIO, ADC • MATLAB® Simulink, Code Composer Studio® Updated Design – Rev 1: • dSPACE® RTI-1104 • ADC ports, PWM CP-18 connector, embedded microcontroller • MATLAB® Simulink software for digital signal processing and ease-of-use display • Removed CCS as an “extra” middle software process. Less complicated and more robust. Updated Design – Rev 2: • Changed from ‘8’-channel design to hybrid ‘4+2’-channel design • Changed from 1 to 2 PCB design – isolate analog from digital and provide safety barrier • Simplified GPIO requirements with PWM MUX select • Added scaling, filtering and digital isolator

  7. dSPACE® Microcontroller dSPACE® ControlDesk dSPACE® RTI-1104

  8. dSPACE® Limitations • Maximum 8 ADC channels • Maximum of 10-Volt ADC processing signal limit • Maximum of 5-Volt system hardware limit • Main reason for switching from ‘8’-channel design to ‘4+2’-channel design was related to these limitations, specifically the 8 ADC channel hardware limitation.

  9. Sensors and Circuits • Voltage Sensor • Current Sensor • Internal Impedance of each Cell. • Temperature Sensor • Ambient • Battery Surface • Amplification • Integration with ADC • Scaling for Multiple Cells • Requirements • 30V • 4 Cells • Integration

  10. Voltage Sensing Circuit

  11. Current Sensor

  12. Current Sensing Circuit

  13. Temperature Sensing Circuit

  14. Interface Circuit

  15. Printed Circuit Board Design

  16. Timeline

  17. Budget • Total Budget $1,000 • Current Expenditure Estimate: • Temperature Sensors and Initial Parts - $156 • PCB Order - $198 • Additional Parts and Expandable Testing Components - $492 • Budget Surplus Estimate $154

  18. Questions ?

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