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Progress Report

Progress Report. 2014/03/12. Agenda. Big-LITTLE Core Scheduling on Hypervisor Simon Efficient Cost Computation You-Cheng VM Introspection Chao- Rui. Big-LITTLE Core Scheduling on Hypervisor. Enabling power-aware big-LITTLE scheduler design on ICL Hypervisor( Xvisor ) Xvisor

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Progress Report

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  1. Progress Report 2014/03/12

  2. Agenda • Big-LITTLE Core Scheduling on Hypervisor • Simon • Efficient Cost Computation • You-Cheng • VMIntrospection • Chao-Rui

  3. Big-LITTLE Core Scheduling on Hypervisor • Enabling power-aware big-LITTLE scheduler design on ICL Hypervisor(Xvisor) • Xvisor • An open-source type-1 hypervisor, which aims at providing a monolithic, light-weight, portable, and flexible virtualization solution. • Type-1:Complete monolithic

  4. Further Details • Schedule vCPU between host CPU. • Hypervisor scheduler may not interfere Guest OS process scheduler.

  5. Two conditions • Guest OS has big-LITTLE-aware scheduler • Hypervisor assign host CPU to guest according to Guest OS requirements. • Guest OS does not have big-LITTLE-aware scheduler • Hypervisor scheduler assign vCPU according to guest condition.

  6. Difficulty • If the scheduler in guest OS is not big-LITTLE-aware • Every (virtual) core is the same. • Load balancing.

  7. Example • Hypervisor will sees two identical vCPU. • Schedule both vCPU to either big cores or LITTLE cores. Domain 0 T1 T2 T3 T4 Scheduler vCPU0 vCPU1 Hyperviosr

  8. What We Expect • Hypervisor will schedule vCPU0 to big core, vCPU1 to LITTLE core. Domain 0 T1 T2 T3 T4 Scheduler vCPU0 vCPU1 Hyperviosr

  9. Summary • The scheduler in guest OS should be big-LITTLE-aware. • Avoid load balancing among vCPUs. • If the scheduler in guest OS is not big-LITTLE-aware • Modify the NICE value of processes in Guest OS does not help either. • Try to modify Guest OS process scheduler.

  10. An Alternative Solution • Modify the CPU mask of each process. • Limit the vCPU a process can execute on. • “Create” big vCPU and LITTLE vCPU Domain 0 T1 T2 T3 T4 Scheduler T1 and T2 only sees vCPU0 T3 and T4 only sees vCPU1 vCPU0 vCPU1

  11. Current Status • Still trying to develop the big-LITTLE core scheduling algorithm.

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