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Channel Coding (II). Cyclic Codes and Convolutional Codes. Topics today. Cyclic codes presenting codes: code polynomials systematic and non-systematic codes generating codes: generator polynomials encoding/decoding circuits realized by shift registers Convolutional codes presenting codes
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Channel Coding (II) Cyclic Codes and Convolutional Codes
Topics today • Cyclic codes • presenting codes: code polynomials • systematic and non-systematic codes • generating codes: generator polynomials • encoding/decoding circuits realized by shift registers • Convolutional codes • presenting codes • convolutional encoder • code trees and state diagram • generator sequences
Defining cyclic codes: code polynomial • An (n,k) linear code X is called a cyclic code when every cyclic shift of a code X, as for instance X’, is also a code, e.g. • Each cyclic code has the associated code vector with the polynomial • Note that the (n,k) code vector has the polynomial of degree of n-1 or less. Mapping between code vector and code polynomial is one-to-one, e.g. they specify the same code uniquely • Manipulation of the associated polynomial is done in a Galois field (for instance GF(2)) having elements {0,1}, where operations are performed mod-2 • For each cyclic code, there exist only onegenerator polynomialwhose degree equals the number of check bits in the encoded word
The common factor of cyclic codes • GF(2) operations (XOR and AND): • Cyclic codes have a common factor pn+1. In order to see this we consider summing two (unity shifted) cyclic code vectors: • Question is how to make the cyclic code from the multiplied code? Adding the last two equations together reveals the common factor: Unshifted Right rotated Right shifted by multiplication
Factoring cyclic code generator polynomial • Any factor of pn+1 (Note: decompose it into factors) with the degree q=n-k generates an (n,k) cyclic code • Example: Consider the polynomial p7+1. This can be factored as • For instance the factors 1+p+p3 or 1+p2+p3, can be used to generate an unique cycliccode. For a message polynomial 1+p2 (I.e. 110), the following encoded word is generated:and the respective code vector (of degree n-1, n=7, in this case) is
Obtaining a cyclic code from another cyclic code • Therefore unity cyclic shift is obtained by (1) multiplication by p where after (2) division by the common factor yields a cyclic codeand by induction, any cyclic shift is obtained by • Example:right shift 101 • (n=3) • Important point is that division by mod pn+1 and multiplication by the generator polynomial is enabled by tapped shift register. not a three-bit code, divide by the common factor
Using shift registers for multiplication • Figure shows a shift register to realize multiplication by 1+p2+p3 • In practice, multiplication can be realized by two equivalent topologies:
Example: multiplication by using a shift register adding dashed line would enable division by 1+pn determined by the tapped connections word to be encoded Encoded word
Examples of cyclic code generator polynomials • The generator polynomial for a (n,k) cyclic code is defined byand G(p) is a factor of pn+1. Any factor of pn+1 that has the degree q may serve as the generator polynomial. We noticed that a code is generated by the multiplication where M(p) is a block of k message bits. Hence this gives a criterion to select the generator polynomial, e.g. it must be a factor of pn+1. • Only few of the possible generating polynomials yield high quality codes (in terms of their minimum Hamming distance) Some cyclic codes:
Systematic cyclic codes • Define the length q=n-k check vector C and the length-k message vector M by • Thus the systematic n:th degree codeword polynomial is message bits check bits Check bits determined by:
Determining check-bits • Prove that the check-bits can be calculated from the message bits M(p) by must be a systematic code based on its definition (previous slide) message check Example: (7,4) Cyclic code:
Decoding cyclic codes • Every valid, received code wordR(p) must be a multiple of G(p), otherwise an error has occurred. (Assume that the probability for noise to convert code words to other code words is very small.) • Therefore dividing the R(p)/G(p) and considering the remainder as a syndrome can reveal if the error has happened and sometimes also to reveal in which bit (depending on code strength) • The error syndrome of n-k-1 degree is therefore • This can be expressed also in terms of error E(p) and the code wordX(p) error syndrome S(p) is:
Decoding cyclic codes: example Using denotation of this example:
Decoding cyclic codes (cont.) error syndrome Table 16.6 error code msg
Part II. Convolutional coding • Block codes are memoryless • Convolution codes have memory that utilizes previous bits to encode or decode following bits • Convolutional codes are specified by n, k and constraint length that is the maximum number of information symbols upon which the symbol may depend • Thus they are denoted by (n,k,L), where L is the code memory depth • Convolutional codes are commonly used in applications that require relatively good performance with low implementation cost • Convolutional codes are encoded by circuits based on shift registers and decoded by several methods as • Viterbi decoding that is a maximum likelihood method • Sequential decoding (performance depends on decoder complexity) • Feedback decoding (simplified hardware, lower performance)
Example: convolutional encoder (n,k,L) = (2,1,2) encoder • Convolutional encoder is a finite state machine processing information bits in a serial manner • Thus the generated code word is a function of input and the state of the machine at that time instant • In this (n,k,L)=(2,1,2) encoder, each message bit influences a span of n(L+1)=6 successive output bits that is the code constraint length • Thus (n,k,L) convolutional code is produced that is a 2n(L-1) state finite-state machine
(3,2,1) Convolutional encoder Here each message bit influences a span of n(L+1)=3(1+1)=6successive output bits
Representing convolutional code: code tree Tells how one input bit is transformed into two output bits (initially register is all zero)
Shift register states Representing convolutional codes compactly: code trellis and state diagram Input state ‘1’ indicated by dashed line