Cray Supercomputers: The Cray X1

1. Cray Supercomputers:The Cray X1 Sara Prochnow Kevin Boucher Brian Femiano Allen Peppler

2. Introduction • Fun Fact- Cray supercomputers consisted of the first vector register technology, immersion cooling technology, gallium arsenide semiconductor technology, and RISC architecture • The X1 is the latest supercomputer from Cray Inc. • The material presented today is that which relates closest to the material covered in Abzug’s CS350 class.

3. Nodes • The basic unit of the Cray machine • A node is made up of four multi-chip modules (MCM) and main memory • The MCMs and memory are attached to routers that allow communication between different nodes

4. Multi-Chip Modules (MCM) • Each MCM contains a single multi-streaming processor (MSP) • MSPs are made up of four scalar single-streaming processors (SSP) and two megabytes of ecache

5. Single-Streaming Processors (SSP) • The four SSPs that make up the MSP are scalar processors with two vector registers which allow the SSPs to fetch, decode, and execute two instructions per clock cycle • Each of the scalar processors contains an instruction and data cache • A data and instruction cache address is forty-eight bits long. The tag field is thirty-five bits long, the set field is eight bits long, and the line-offset field is five bits long

6. ECache • The ecache is a high speed cache that gives the processors a large amount of temporary storage • The ecache is similar in structure to the data and instruction caches • It is addressed exactly the same, but its format is slightly different. Instead of 256 sets of lines, it has 32,768 sets of lines.

7. Memory • Sixteen memory controller chips and thirty-two dynamic random access (DRAM) daughter memory cards are in each node • The daughter memory cards come in two sizes, 288 megabit chips and 576 megabit chips. • There is a total of sixteen gigabytes or thirty-two gigabytes of memory available

8. Global Addressability • every node is connected by means of a system of routers, which allows the memory on each node to be globally addressable • memory on any node can be accessed by not only the components on its node, but by any component on any node

9. Word Size • The memory on each node is broken up into seventy-two bit words • Sixty-four of these bits are used for data and can be used for sixty-four bits operations or broken up into two sections for thirty-two operations • The other eight bits are used for single-error-correction, double-error-detection

10. Modes • Memory can run in two possible modes that will allow for the loss of memory cells due to unforeseen circumstances • The first mode reserves half of the memory chips on each card to cover the potential loss of a memory chip. • The second mode reserves half of the daughter cards in case an entire card is lost.

11. Cabinets • Cray machines can be purchased in one of two types of cabinets, air cooled and liquid cooled • An air cooled system can hold up to four nodes (sixteen MSPs) • A liquid cooled cabinet can hold up to sixteen nodes (sixty-four MSPs). • How do these cabinets work?

12. Applications • The Army High Performance Computing Research Center • Nuclear simulation research • Code breaking and cryptology

13. Still want to learn more? A small amount was presented today More can be found at: www.cray.com QUESTIONS?