SMOV4 Update: ACS Status

1. David Golimowski (TIPS/JIM 16 Jul 2009) Outline SMOV4 Update: ACS Status • Summaries of Functional Test and Optimization Campaign • WFC and SBC Performance and Characteristics • Implications of SI C&DH Anomaly (HSTAR 11880) • Assessment of Day 174 Suspend (HSTAR 11895) • SMOV Status and Forward Plan

2. ACS-R hardware successfully installed on 16 May 2009 during EVA-3 • WFC and SBC passed Aliveness and Functional Tests; HRC not recovered • Day 146 (26 May): WFC 12-hour anneal performed; pre- and post-anneal dark frames show little change indicating that 18 month hiatus at ambient -10 C was sufficient to anneal nearly all temporary hot pixels. • Day 148 (28 May): WFC Optimization Campaign commenced • Day 150 (30 May): SBC UV contamination check; BEA exit deemed safe • Optimization Campaign contained general WFC Performance Summary and multiple exploratory tests involving changes in bias and clock voltages and data transmission timing. Tests showed that all pre-failure settings remained valid for CEB-R operations and that no changes in default settings were warranted. ACS-R Functional Test and Optimization Campaign - 1

3. WFC Bias and Dark Frames Superdark from Prop 11369 (SMOV CCD Functional Test) Superbias from Prop 11369 (SMOV CCD Functional Test)

4. WFC Linearity and Full Well Photon Transfer Test from Iteration 1 of O.C. (Amplifier D, Dual-Slope Integrator)

5. WFC Performance Summary * Projected and problematic values from Gilliland et al. 2008 (TIR ACS 2008-04) . **Residual bias shift after analytical correction of signal-dependent effect.

6. Optimization Campaign truncated on 3 June 2009 after Iteration 2  Performance matched or exceeded projections and expectations  VOD offsets of < -1 V produce anomalous behavior in amps C and D that mimic charge-injection but remain unexplained by Tiger Team  HSTMO and Project elect to proceed with WFC default configuration and continue “off-line” investigation of VOD anomaly • Dual-Slope Integrator selected as default mode of ASIC pixel sampling • Low-frequency bias variations and signal dependent “bias shift” can be effectively removed during post-image processing • Bias striping pattern varies among quadrants and between frames; caused by 1/f noise (1 mHz to 1 Hz) generated with ASIC during setting of bias voltage offset. Striping appears constant across rows of CCD, so may be removable. ACS-R Functional Test and Optimization Campaign - 2

7. VDD: +27V, VLG: -3V (defaults) VOD: +14V (default is +15V) Bias VOD (Reset Drain) Anomaly Illumination 1 Illumination 2

8. SBC UV Contamination F125LP Bright Earth photopolymerizes contaminants onto pickoff mirror Pre SM4 (short) Post SM4 (short & long) F150LP Delta Mag (Pre-Post SM4) F115LP = -0.034 +/- 0.017 F125LP = -0.014 +/- 0.013 F140LP = -0.019 +/- 0.015 F150LP = 0.002 +/- 0.015 F165LP = 0.008 +/- 0.015

9. HST safed on Day 166 (15 June) after failure of SIC&DH toggle test; all SI commanding lost; SIs remain in state at time of SIC&DH failure; SMS continues to execute; HST continues to slew • Tiger Teams assembled to investigate:  Dangers to SI detectors (MAMA, CCD, IR) due to overexposure during Bright Earth crossings, SAA crossings, and slews across bright stars  Potential polymerization of contaminants on optics in UV channels • Implications for ACS:  No danger to CCDs; WFC science can continue unimpeded  SBC MAMA vulnerable to catastrophic damage during BE crossings  Impact of SAA on MAMA unknown because HV normally turned off  ACS optics exposed to 100s of hrs of BE crossings with no ill-effects • SBC concerns resolved by 486 FSW revision that automatically shuts down MAMA HV after future (expected) SIC&DH anomalies SIC&DH Anomaly (HSTAR 11880)

10. ACS suspended on 23 June as result of 2 Error Status Buffer messages:  ACS 955: CEB Command Max Retries Exceeded  ACS 1002: NED ASIC Not Alive • Status at time of suspend:  No observations executing or lost All monitored currents and voltages normal  ASIC & FPGA properly initialized & functioning after SMS 173 reboot  Error occurred during NED collection cycle (CS to ASIC comm broken)  HST orbital position far from SAA • Tiger Team formed on 24 June and identified 2 possible causes:  ASIC Status Line raised (informs FPGA of bit anomaly or comm error)  FPGA reset in response to SEU of power regulator Day 174 Suspend (HSTAR 11895)

11. FPGA/ASIC Relationship

12. ASIC Status Line scenario not favored because it produces only ACS 955 ESB message and does not explain “ASIC Not Alive” failure • Radiation test reports now available show ambient heavy-ion flux sufficient to upset power regulator once every ~100 days  SEU causes small voltage drop that triggers Power On Clear circuit FPGA and ASIC both reset; only FPGA reboots  Scenario explains both ACS 955 and ACS 1002 ESB messages • Event will happen again, but signature of anomaly will depend on timing of SEU with phase of FPGA/ASIC/telemetry duty cycle • Tiger Team investigating FSW changes to inhibit suspend action in this particular instance of ACS 955 error message Possible Causes of Day 174 Suspend

13. Both SBC and WFC have had successful and spectacular “first light” external observations. (No pretty pictures -- sorry!) • WFC focus is -2.5 m off nominal. Other SIs will be made confocal with WFC and secondary mirror will be moved next week. • All SBC and WFC SMOV programs have been executed and data analysis is underway. Several SMOV programs (all HRC; WFC half-speed; coarse & fine corrector alignment) were unnecessary and dropped. • VOD anomaly and its possible beneficial use to mitigate CTE through charge-injection will being investigated • Changes to FSW being considered to prevent suspend after SEU of CEB-R (expected every 100 days) • ACS cleared for GO Science!!! Status and Forward Plan