300 likes | 442 Views
Radio-Frequency Effects in Integrated Circuits . Yun Bai Directed by Professor Neil Goldsman. Abstract. Tendency of IC evolvement: faster speed and higher chip density. Inductance of on-chip interconnects draws more attention in terms of signal transmission and circuit design.
E N D
Radio-Frequency Effects inIntegrated Circuits Yun Bai Directed by Professor Neil Goldsman
Abstract • Tendency of IC evolvement: faster speed and higher chip density. • Inductance of on-chip interconnects draws more attention in terms of signal transmission and circuit design. • Skin effects and semiconductor substrate losses are considered. • Electromagnetic coupling happens between on-chip components and affects circuit performance.
Thesis Outline • Introduction to Inductance • Characterization of On-Chip Interconnects • Characterization of On-Chip Inductors • High-Speed On-Chip Digital Signal Transmission • Electromagnetic Coupling Effects
Transmission Line Theory freq > 1GHz Chip density > tens of millions of transistors RLC delay due to interconnects become significant Metal – SiO2 – Si – Ground Plane Distributed Circuit Model
On-Chip Inductors • Analog RF Circuits: • Low Noise Amplifiers • Mixers • Voltage-Controlled Oscillators Experimental EM Simulator Numerical Modeling Empirical Equations
Electromagnetic Coupling • Bus Lines • Interconnects EM Simulator Numerical Modeling Empirical Equations
What is Inductance? • Energy Definition: Magnetic Energy Storage • Flux Definition: Magnetic Flux Leakage • Circuit Definition: Induced Voltage by AC Current
Internal Self-Inductance Internal Impedance: Maxwell’s Equation: Skin Effect:
External Self-Inductance Average Flux: Loop Inductance
Mutual Inductance Magnetic Vector Potential:
What is L for an Interconnect Internal + External
Interconnect Internal Impedance Current Distribution: 1D approximation:
Interconnect External Impedance Quasi-TEM Slow Mode
Inductor Inductance N L S Na
Inductor Resistance N L S Na
Multi-Layer Spiral • Higher Inductance • Less Chip Area • Higher Q Factor
On-Chip Digital Transmission rising/falling < 10 ps Vs = 1.26 V Each Box: 1 mm
Signal Attenuation, Delay, Dispersion 1 GHz : 220 ps 9 GHz : 150 ps Critical Length: 8 mm
Scattering Parameters S11: Insertion Loss at Port 1 when Port 2 is matched S21: Forward Gain from Port 1 to Port 2 when Port 2 is matched
Acknowledgement • Professor Neil Goldsman • Our Group: Zeynep, Xi, Akin, Bo, … • Committee: Professor Peckerar and Orloff