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CPE 731 Advanced Computer Architecture Instruction Set Principles

CPE 731 Advanced Computer Architecture Instruction Set Principles . Dr. Gheith Abandah Adapted from the slides of Prof. David Patterson, University of California, Berkeley. Outline. Instruction Set Architecture (ISA) Computer Architecture v. Instruction Set Arch. Processor Types

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CPE 731 Advanced Computer Architecture Instruction Set Principles

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  1. CPE 731 Advanced Computer Architecture Instruction Set Principles Dr. Gheith Abandah Adapted from the slides of Prof. David Patterson, University of California, Berkeley

  2. Outline • Instruction Set Architecture (ISA) • Computer Architecture v. Instruction Set Arch. • Processor Types • ISA Classes • How the Architect Can Help the Compiler Writer? • MIPS 64 CPE 731, ISA

  3. Instruction Set Architecture: Critical Interface • Properties of a good abstraction • Lasts through many generations (portability) • Used in many different ways (generality) • Provides convenient functionality to higher levels • Permits an efficient implementation at lower levels software instruction set hardware CPE 731, ISA

  4. Example: MIPS r0 r1 ° ° ° r31 0 Programmable storage 2^32 x bytes 31 x 32-bit GPRs (R0=0) 32 x 32-bit FP regs (paired DP) HI, LO, PC Data types ? Format ? Addressing Modes? PC lo hi • Arithmetic logical • Add, AddU, Sub, SubU, And, Or, Xor, Nor, SLT, SLTU, • AddI, AddIU, SLTI, SLTIU, AndI, OrI, XorI, LUI • SLL, SRL, SRA, SLLV, SRLV, SRAV • Memory Access • LB, LBU, LH, LHU, LW, LWL,LWR • SB, SH, SW, SWL, SWR • Control • J, JAL, JR, JALR • BEQ, BNE, BLEZ,BGTZ,BLTZ,BGEZ,BLTZAL,BGEZAL 32-bit instructions on word boundary CPE 731, ISA

  5. SOFTWARE Instruction Set Architecture “... the attributes of a [computing] system as seen by the programmer, i.e. the conceptual structure and functional behavior, as distinct from the organization of the data flows and controls the logic design, and the physical implementation.” – Amdahl, Blaauw, and Brooks, 1964 -- Organization of Programmable Storage -- Data Types & Data Structures: Encodings & Representations -- Instruction Formats -- Instruction (or Operation Code) Set -- Modes of Addressing and Accessing Data Items and Instructions -- Exceptional Conditions CPE 731, ISA

  6. Outline • Instruction Set Architecture (ISA) • Computer Architecture v. Instruction Set Arch. • Processor Types • ISA Classes • How the Architect Can Help the Compiler Writer? • MIPS 64 CPE 731, ISA

  7. ISA vs. Computer Architecture • Old definition of computer architecture = instruction set design • Other aspects of computer design called implementation • Insinuates implementation is uninteresting or less challenging • Our view is computer architecture >> ISA • Architect’s job much more than instruction set design; technical hurdles today more challenging than those in instruction set design • Since instruction set design not where action is, some conclude computer architecture (using old definition) is not where action is • We disagree on conclusion • Agree that ISA not where action is (ISA in CA:AQA 4/e appendix) CPE 731, ISA

  8. Comp. Arch. is an Integrated Approach • What really matters is the functioning of the complete system • hardware, runtime system, compiler, operating system, and application • In networking, this is called the “End to End argument” • Computer architecture is not just about transistors, individual instructions, or particular implementations • E.g., Original RISC projects replaced complex instructions with a compiler + simple instructions CPE 731, ISA

  9. Computer Architecture is Design and Analysis • Architecture is an iterative process: • Searching the space of possible designs • At all levels of computer systems Creativity Cost / Performance Analysis Good Ideas Mediocre Ideas Bad Ideas CPE 731, ISA

  10. Outline • Instruction Set Architecture (ISA) • Computer Architecture v. Instruction Set Arch. • Processor Types • ISA Classes • How the Architect Can Help the Compiler Writer? • MIPS 64 CPE 731, ISA

  11. Processor Types • General-Purpose Processors (desktop, server) • Use compilers • Special-Purpose Processors (Embedded applications) • Use kernels written in assembly language • Reduced Instruction Set Computer (RISC) • MIPS, Power, Alpha • Complex Instruction Set Computer (CISC) • 80x86, VAX CPE 731, ISA

  12. Outline • Instruction Set Architecture (ISA) • Computer Architecture v. Instruction Set Arch. • Processor Types • ISA Classes • How the Architect Can Help the Compiler Writer? • MIPS 64 CPE 731, ISA

  13. ISA Classes CPE 731, ISA

  14. ISA Classes • Number of Operands • Zero: Stack • add • One: Accumulator • add B • Two: Register and Memory • add R1, R2 • Three: Register and Memory • add R1, R2, R3 • Operands Types • Register-Register (RISC) • Register-Memory (CISC) • Memory-Memory (CISC) CPE 731, ISA

  15. Instruction Encoding CPE 731, ISA

  16. Instruction Encoding: MIPS Example CPE 731, ISA

  17. Addressing Modes • Register add r1, r3 • Immediate addi r1, 10 • Displacement add r1, 100(r3) • Register indirect add r1, (r3) • Indexed add r1, (r3+r4) • Direct or absolute add r1, (1000) • Memory indirect add r1, @(r3) • Auto-increment add r1, (r3)+ • Auto-decrement add r1, (r3)- • Scaled add r1, 100(r3)[r4] Can the black addressing modes be implemented from the red? CPE 731, ISA

  18. Outline • Instruction Set Architecture (ISA) • Computer Architecture v. Instruction Set Arch. • Processor Types • ISA Classes • How the Architect Can Help the Compiler Writer? • MIPS 64 CPE 731, ISA

  19. How the Architect Can Help the Compiler Writer? • Compiler optimizations can give orders in magnitude improvement in: • Performance • Code size • Can Help by: • Provide regularity: operations, registers, addressing modes are orthogonal. • Provide Primitives, not solutions (semantic gap) • Simplify tradeoffs among alternatives CPE 731, ISA

  20. Outline • Instruction Set Architecture (ISA) • Computer Architecture v. Instruction Set Arch. • Processor Types • ISA Classes • How the Architect Can Help the Compiler Writer? • MIPS 64 CPE 731, ISA

  21. MIPS 64 • 32 64-bit GPR r0, r1, r2, … • 32 64-bit FPR f0, f1, f2, … • Memory Instructions • LW LD Rt, disp(Rs) • SW SD Rt, disp(Rs) • L.S L.D Ft, disp(Rs) • S.S S.D Ft, disp(Rs) • Integer Arithmetic Operations • ADD DADD Rd, Rs, Rt • FP Arithmetic Operations • ADD.S ADD.D Fd, Fs, Ft • MUL.S MUL.D Fd, Fs, Ft CPE 731, ISA

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