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Cadence soc encounter - PowerPoint PPT Presentation

A Framework for High-Level Synthesis of System-on-Chip Designs

`. Custom Logic HDL Code. Firmware C/C++ Code. VHDL Compiler Verilog Compiler. C/C++ Compiler Object Linker. Custom Logic. ram.dat rom.dat. Leon. HDL Simulator: NC-Sim. Simulation Waveforms. TXT.OUTPUT. INT.OUTPUT. SOCks ASIC. Leon. Custom Logic. Sparc CPU. Memory Controller.

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Cadence soc encounter - PowerPoint PPT Presentation

A Framework for High-Level Synthesis of System-on-Chip Designs