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Ratioed logic - PowerPoint PPT Presentation

Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering

ELEC 5970-001/6970-001(Fall 2005) Special Topics in Electrical Engineering Low-Power Design of Electronic Circuits Pseudo-nMOS, Dynamic CMOS and Domino CMOS Logic. Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering Auburn University

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Issues to study

Issues to study. Vdd. D. S. IN. OUT. S. D. Explain why MOSFET is a better switch than a bipolar transistor? What is a switch-level simulator? Explain why the following circuit cannot be used as a buffer. What is a technology-independent layout design?

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Ratioed logic - PowerPoint PPT Presentation

Vishwani D. Agrawal James J. Danaher Professor Department of Electrical and Computer Engineering

Issues to study