A low mass microbulk with real x-y strips structure RD51 Common projects

1. A low mass microbulk with real x-y strips structure RD51 Common projects Theo Geralis, NCSR Demokritos 3rd Annual INPP Meeting 17/06/2013 • Collaborating groups • NCSR Demokritos • IRFU Saclay • Univ. of Zaragoza • CERN • Outline • Project aim • Progress • Planning T. Geralis

2. Aim of the proposal  • To develop microbulk Micromegas • detectors with segmented mesh • 1) Real x-y structure • 2) Mass minimization • 3) Production Simplification • 4) Large surface detectors X-strips Y-strips Challenges: 1) Etching of y-strips Keep y-strips fixed, Etching the kapton under the holes without completely removing the material in between the y-strips 2) No global trigger signal use proper electronics  AGET (auto – trigger capability) 3) Provide bias on every y-strip T. Geralis

3. Production of “Real x-y” Micromegas 1st batch produced at CERN (Feb 2012) Detector characteristics: Active area ~ 38 x 38 mm2, Cu strips, pitch 1mm, strips interspacing 100 μm, amplification width 50 μm 1st batch produced at CERN: naked structure (no vias for connectors etc). few strips were operational, manual testing strip by strip, could not hold HV 2nd batch was to be produced at CERN (~Apr. 2012) : New production technique – 4 Micromegas prototypes After a long delay, we are glad to have Serge Ferry back in the project! T. Geralis

4. Serge FERRY-TE/MPE/EM 28/09/2012 1 Base material 50 µm polyimide foil copperclad Photoresistliquidspinning, masking, exposure, development in clean room 2 New Microbulk stripmethod 3 Chemicaletching of coppergrid of holes 4 Polyimideetching by sprayerFig:microbulkstrip grille.pdf Photoresitlamination on top and bot for makingstrip,X and Y , masking,exposure, development 5 6 Chemicaletching of copper top and bot + chemicaletching of chromium Fig:microbulk strip top4.pdf,Fig:microbulkstrip anode4.pdf 7 Cleaning + passivation, electrical test at 600v Improvements: 2nd Batch : Develop first the mesh holes and then the x and y strips No holes above the anode strips gaps 1st Batch: Reverse development order, holes everywhere in the mesh strips

5. GRID Layout Grid Holes: Diameter = 40 μm Homogeneous spacing Placing on equilateral triangles vertices of Side = 100 μm x/anode strips y/mesh strips T. Geralis

6. X-Y strips layout and readout connections Mesh strips: y-strips Active area ~ 20 x 20 mm2, Cu strips, pitch 1mm, strips interspacing 100 μm, amplification width 50 μm 20 X-strips readout connections Anode strips: x-strips 20 Y-strips readout connections T. Geralis

7. Layout Optimization using Comsol Gap between y-strips: 100 um, Mesh holes: 50 um Electric Field Gap between y-strips: 40 um, Mesh holes: 60 um No Gap between y-strips: 40 um resistive, Mesh holes: 60 um

8. The mesh y-strips FE electronics The mesh y-strips FE electronics y-strips need to be supplied by the bias HV and be readout at the same time to provide the y information. A special Front End readout card was designed. The circuit has the following characteristics: Readout up to 64 strips, HV supply for every strip independently, Selection of HV supplied strips individually, Transient voltage suppression (TVS) protection and 5) Single-channel read-out and all-channel read-out. T. Geralis

9. ReducedGet • 1 AsAd • 1 R-CoBo (ML507) TPC GET Status from F. Druillole AGET TestBench End of 2012 BEM MUTANT Sync Commands • Actual system :AgettestBench – R-CoBo + 1 AsAd + 1(4) AGET - Trigger ASAD ASAD ASAD ASAD AGET AGET AGET AGET AGET AGET AGET AGET AGET AGET AGET AGET AGET AGET AGET AGET Fast AcquisitionCOBO (+ INBO) Clock & ASAD Readout (Zero Suppress) ADC ADC ADC ADC ADC ADC ADC ADC ADC ADC ADC ADC ADC ADC ADC ADC External Multiplicities Offline Analysis AdditionalSignal Processing External Systems MEMORY Network Transfer 1800000 evts in 14h  35 evt/s Control &Monitoring Global Network GET Network Switch Data Server Computer Farm

10. Waiting for the AGET electronics, we plan to use the VMM1 readout

11. Proposed methodology Design and build the segmented mesh: Zero-th version prototype – proof of principle. Then improve geometry (holes dimension, pitch, strip width etc) for optimum transparency, signal collection, stability etc. Build the detector: First tests in test bench setup. Then design build proper housing. Finally tests in shielded cage. Develop the electronics and the readout: First tests with standard laboratory equipment, then use AGET electronics. If delayed we will use T2K AFTER readout adapted with proper trigger. Design proper HV electronics for y-strips bias distribution and signal collection 4) Perform exhaustive tests, optimize parameters Timetable T. Geralis

12. Near future activities • First test on the new Micromegas • (electrical tests, etc) • If OK, then perform as follows • i) Classic Micromegas tests (connect all mesh strips) • transparency, gain, E resolution, x resolution etc • if NOT OK, investigate and reiterate (design, build, test) • 3) HV electronics (next month) • 4) Perform tests in generic tests housing • 5) Complete tests with AGET electronics and the detector • 5) New Design (larger scale, possibility to use in CAST) • 6) Design, build final housing T. Geralis

13. CONCLUSIONS • After a long delay the fabrication of real x-y Micromegas is resumed • The second production series of 4 Micromegas prototypes with • real x-y strips (segmented mesh) are being manufactured and will • be delivered in one week. • First tests will be performed and will be decisive if a new design and • production will be launched or exhaustive tests will be done on • the performance of the current design • The readout electronics are designed and are being manufactured • (pcb is ready and components need to be mounted) T. Geralis