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Maze Routing

Explore innovative techniques such as Lee’s Algorithm, Multi-Terminal Nets, and Hadlock’s Algorithm to enhance chip routing efficiency. Learn strategies for multi-point net connections and reducing run time. Includes discussion on vias in multilayer routing.

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Maze Routing

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  1. Maze Routing مرتضي صاحب الزماني

  2. Improving Lee’s Algorithm • The choice of the starting pin can affect the speed of the algorithm, • one guideline is to start on the pin farthest from the center of the chip • Use double fan out - begin at both pins and continue until a point of contact is made • Use framing, • an artificial rectangular boundary 10 to 20% larger than the boundary formed by the pins مرتضي صاحب الزماني

  3. Schemes to Reduce Run Time 1. Starting Point Selection: 2. Double Fan-Out: 3. Framing: T S S T S S T T مرتضي صاحب الزماني

  4. Multi-Terminal Nets • For a k-terminal net, connect the k terminals using a rectilinear Steiner tree with the least wire length on the maze. • This problem is NP-Complete! • So, just want to find some good heuristic. • This problem can be solved by extending the Lee’s algorithm. Any idea ….. مرتضي صاحب الزماني

  5. Connecting Multipoint Nets • One point is selected as the source and all the other points are the target • propagate from the source until one target is reached • find the path from the source to that target • all the cells on the path are labeled as source cells and the remaining unconnected pins are targets • repeat the steps مرتضي صاحب الزماني

  6. 4 1 2 2 1 1 4 3 3 2 1 2 5 3 3 4 4 2 S 3 2 1 1 2 1 3 4 3 2 3 5 1 4 T 3 4 3 4 3 1 4 1 2 5 3 4 2 2 1 1 2 4 1 4 2 5 1 3 4 3 2 3 3 5 4 2 5 1 2 3 4 1 5 4 4 3 4 3 2 T 2 1 5 4 4 5 2 1 4 3 3 5 4 4 3 2 1 2 3 Example Start at the source and run the maze router until you hit a target Every cell on the path is a source – run the maze router مرتضي صاحب الزماني

  7. Hadlock’s Algorithm to Reduce Run Time “A Shortest Path Algorithm for Grid Graphs”, F.O. Hadlock, Networks, 7:323-334, 1977. مرتضي صاحب الزماني

  8. Hadlock’s Algorithm • Detour Number: For a path P from S to T, • d(P) = # of grids directed away from T, then • L(P) = MD(S,T) + 2d(P) So minimizing L(P) and d(P) are the same. Length Manhattan Distance D D D: Detour d(P) = 3 MD(S,T) = 6 L(P) = 6+2x3 = 12 D S T مرتضي صاحب الزماني

  9. Hadlock’s Algorithm • Label vertices with detour numbers instead of distance. • Vertices with smaller detour number are expanded first. • Therefore, favor paths without detour. 2 2 3 3 2 1 1 1 S 0 1 0 0 0 2 T 1 0 2 1 1 2 2 2 2 2 2 2 3 مرتضي صاحب الزماني

  10. Hadlock’s Algorithm مرتضي صاحب الزماني

  11. Multilayer Routing • Give a system with multiple wire layers • Parallel grids vertically stacked, one for each layer • Use vias to access other layers • Label cells as to whether a via is permitted at its location • How do we find wire paths in such a structure? مرتضي صاحب الزماني

  12. Multilayer Routing مرتضي صاحب الزماني

  13. Aside: VIAs • Vias: • “Vertical” electrical connection • Issue: size • On chips, vias are usually a lot bigger than wire widths so you have to be careful where you put them • You can’t put vias as close to each other as you can put wires مرتضي صاحب الزماني

  14. 3 5 3 4 5 2 2 3 1 2 5 5 4 5 4 3 3 1 2 4 5 5 4 4 1 S v v 2 5 5 3 4 2 1 5 4 3 4 5 3 2 5 5 4 5 3 5 4 4 5 T v v 4 5 5 5 5 Example • Given two metal layers with vias allowed in some cells (labeled as ‘v’) Expansion may go up and down as well as to adjacent cells v v Layer 1 Layer 2 مرتضي صاحب الزماني

  15. References • David Pan, VLSI Physical Design Automation, Lecture Slides, University of Texas, 2009. مرتضي صاحب الزماني

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