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Digital Watch 구현

Digital Watch 구현. Lecture #13. Digital Watch – Design Specification. VHDL 의 입출력 설계 사양 입력 : Clock : 12MHz Key 3 개 : RESET SW, SET SW, INC SW 출력 : LCD Interface : E, RS, RW, D0, D1, D2, D3, D4, D5, D6, D7. RESET. SET. INC. Digital Watch – Design Specification.

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Digital Watch 구현

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  1. Digital Watch 구현 Lecture #13

  2. Digital Watch – Design Specification • VHDL의 입출력 설계 사양 • 입력 : • Clock : 12MHz • Key 3개 : RESET SW, SET SW, INC SW • 출력 : • LCD Interface : E, RS, RW, D0, D1, D2, D3, D4, D5, D6, D7 모바일컴퓨터특강

  3. RESET SET INC Digital Watch – Design Specification • 입력장치( Input Device ) • 3개의 푸시 버튼 스위치를 사용 • RESET SW, SET SW, INC SW • 각각의 스위치는 눌러질 경우에 1을 출력하고, 평상시에는 0을 출력하는 구조 모바일컴퓨터특강

  4. Digital Watch – Design Specification • 출력장치(Output Device) • Character LCD 16문자 2줄 D.D.RAM의 주소 모바일컴퓨터특강

  5. Digital Watch – Design Specification • Digital Watch 동작 설계 (1) 초기 POWER ON시 RESET상태 ( = Initial_State ) - 초기에 표시되는 값은 AM 12 : 00 임 - AM 12 00 전체가 0.5초 간격으로 깜박거림 - SET KEY가 눌러지면 시간 수정모드의 처음인 TIME AM/PM SETTING MODE 로 이동 모바일컴퓨터특강

  6. Digital Watch – Design Specification (2) 시간 수정모드 ① TIME AM/PM SETTING MODE ( = Time_AmPm_Set_State ) - 초기상태는 AM/PM위치의 LED가 0.5초 간격으로 깜박이며 다른 부분은 DISPLAY ON됨 - INC KEY에 의해 AM/PM이 반전되어 나타남 - SET KEY를 누르면 TIME HOUR SETTING MODE로 이동 ② TIME HOUR SETTING MODE ( = Time_Hour_Set_State ) - 현재의 HOUR을 나타내는 LED가 0.5초 간격으로 깜박임 - INC KEY에 의해 1씩 증가함 12  1  2  3  4  5  6  7  8  9  10  11  12  .. - SET KEY를 누르면 TIME MIN HIGH SETTING MODE로 이동 Set Key나 Inc Key 2가지 입력 중 어느 하나의 Key라도 눌러지면 그 시점에 동기를 맞춰 켜짐부터 깜박임을 다시 시작해야 한다.=> 이런 디스플레이 방식이 시간 수정 시에 자연스럽다. 모바일컴퓨터특강

  7. Digital Watch – Design Specification (2) 시간 수정모드 ③ TIME MIN HIGH SETTING MODE ( = Time_Min_High_Set_State ) - 현재의 분의 HIGH를 나타내는 LED가 0.5초 간격으로 깜박임 - INC KEY에 의해 1씩 증가함 0  1  2  3  4  5  0  .. - SET KEY를 누르면 TIME MIN LOW SETTING MODE로 이동 ④ TIME MIN LOW SETTING MODE ( = Time_Min_Low_Set_State ) - 현재의 분의 LOW를 나타내는 LED가 0.5초 간격으로 깜박임 - INC KEY에 의해 1씩 증가함 0  1  2  3  4  5  0  .. - SET KEY를 누르면 NORMAL TIME MODE로 이동 모바일컴퓨터특강

  8. Digital Watch – Design Specification (3) NORMAL TIME MODE ( = Normal_Time_State ) - 현재 진행되는 시간을 나타냄 - SET KEY가 눌러지면 시간 수정모드의 처음인 TIME AM/PM SETTING MODE 로 이동 모바일컴퓨터특강

  9. Digital Watch –전체 회로 LCD의 밝기 조절 회로. 이 부분을 VHDL로 설계함. CharacterLCD사용. 모바일컴퓨터특강

  10. Digital Watch – Top Level 구성 모바일컴퓨터특강

  11. Digital Watch – Top Level 구성 BCD -> ASCII 변환부 LCD Interface 부 이 블록을 제외하고 나머지는 Digital Watch – FND Interface와 같음. 모바일컴퓨터특강

  12. Digital Watch – Top Level Entity (1) -- purpose : clock top block -- ver 2 : LCD interface LIBRARY IEEE; USE IEEE.std_logic_1164.all; entity clocklcd is port( clk : in std_logic; reset_sw : in std_logic; set_sw : in std_logic; inc_sw : in std_logic; --; e : out std_logic; rw : out std_logic; rs : out std_logic; data : out std_logic_vector(7 downto 0) ); end clocklcd; Architecture a of clocklcd is signal set_button, inc_button : std_logic; signal set_shot, inc_shot : std_logic; signal reset, Hz100 : std_logic; signal state : std_logic_vector(3 downto 0); signal time_set_mode : std_logic; -- time counters for 7 segment signal time_ampm : std_logic; signal time_hour_high : std_logic; signal time_hour_low : std_logic_vector(3 downto 0); signal time_min_high : std_logic_vector(2 downto 0); signal time_min_low : std_logic_vector(3 downto 0); signal time_sec_high : std_logic_vector(2 downto 0); signal time_sec_low : std_logic_vector(3 downto 0); signal led_blink : std_logic; signal buzzer_blink : std_logic; -- for 0.5 sec buzer blink 모바일컴퓨터특강

  13. Digital Watch – Top Level Entity (2) signal initial_state : std_logic; signal time_ampm_set_state : std_logic; signal time_hour_set_state : std_logic; signal time_min_high_set_state : std_logic; signal time_min_low_set_state : std_logic; signal normal_time_state : std_logic; signal s_select_hour_high : std_logic; -- for hour_high=0 : display Off; signal LCD_time_ampm_ap : std_logic_vector(7 downto 0); signal LCD_time_ampm_m : std_logic_vector(7 downto 0); signal LCD_time_hour_high : std_logic_vector(7 downto 0); signal LCD_time_hour_low : std_logic_vector(7 downto 0); signal LCD_time_min_high : std_logic_vector(7 downto 0); signal LCD_time_min_low : std_logic_vector(7 downto 0); signal LCD_time_sec_high : std_logic_vector(7 downto 0); signal LCD_time_sec_low : std_logic_vector(7 downto 0); signal LCD_time_sec_colon : std_logic_vector(7 downto 0); component statemachine port ( clk : in std_logic; reset : in std_logic; set_shot : in std_logic; initial_state : out std_logic; time_ampm_set_state : out std_logic; time_hour_set_state : out std_logic; time_min_high_set_state : out std_logic; time_min_low_set_state : out std_logic; normal_time_state : out std_logic; time_set_mode : out std_logic ); end component; 모바일컴퓨터특강

  14. Digital Watch – Top Level Entity (3) component timecount port( clk : in std_logic; reset : in std_logic; inc_shot : in std_logic; set_shot : in std_logic; initial_state : in std_logic; time_ampm_set_state : in std_logic; time_hour_set_state : in std_logic; time_min_high_set_state : in std_logic; time_min_low_set_state : in std_logic; normal_time_state : in std_logic; -- time counters for 7 segment time_ampm : buffer std_logic; time_hour_high : buffer std_logic; time_hour_low : buffer std_logic_vector(3 downto 0); time_min_high : buffer std_logic_vector(2 downto 0); time_min_low : buffer std_logic_vector(3 downto 0); time_sec_high : buffer std_logic_vector(2 downto 0); time_sec_low : buffer std_logic_vector(3 downto 0); buzzer_blink : buffer std_logic -- for 0.5 sec buzer blink ); end component; component ledblink port( clk : in std_logic; reset : in std_logic; set_shot : in std_logic; inc_shot : in std_logic; initial_state : in std_logic; time_set_mode : in std_logic; led_blink : buffer std_logic ); end component; 모바일컴퓨터특강

  15. Digital Watch – Top Level Entity (4) component LCD_IF port( clk : in std_logic; -- 10KHz : 0.1msec = 100usec resetb : in std_logic; -- LCD input : time information LCD_time_ampm_ap : in std_logic_vector(7 downto 0); LCD_time_ampm_m : in std_logic_vector(7 downto 0); LCD_time_hour_high : in std_logic_vector(7 downto 0); LCD_time_hour_low : in std_logic_vector(7 downto 0); LCD_time_min_high : in std_logic_vector(7 downto 0); LCD_time_min_low : in std_logic_vector(7 downto 0); LCD_time_sec_high : in std_logic_vector(7 downto 0); LCD_time_sec_low : in std_logic_vector(7 downto 0); LCD_time_sec_colon : in std_logic_vector(7 downto 0); e : out std_logic; rw : out std_logic; rs : out std_logic; data : out std_logic_vector(7 downto 0) ); end component; component Hz100ctrl port( clk,nclr : in std_logic; Hz100 : out std_logic ); end component; component shotpulse port( clk : in std_logic; reset : in std_logic; d : in std_logic; rising_shot : out std_logic ); end component; 모바일컴퓨터특강

  16. Digital Watch – Top Level Entity (5) component ToLCDBlink port( initial_state : in std_logic; time_ampm_set_state : in std_logic; time_hour_set_state : in std_logic; time_min_high_set_state : in std_logic; time_min_low_set_state : in std_logic; normal_time_state : in std_logic; led_blink : in std_logic; -- time clock time_ampm : in std_logic; time_hour_high : in std_logic; time_hour_low : in std_logic_vector(3 downto 0); time_min_high : in std_logic_vector(2 downto 0); time_min_low : in std_logic_vector(3 downto 0); time_sec_high : in std_logic_vector(2 downto 0); time_sec_low : in std_logic_vector(3 downto 0); -- LCD input : time information LCD_time_ampm_ap : out std_logic_vector(7 downto 0); LCD_time_ampm_m : out std_logic_vector(7 downto 0); LCD_time_hour_high : out std_logic_vector(7 downto 0); LCD_time_hour_low : out std_logic_vector(7 downto 0); LCD_time_min_high : out std_logic_vector(7 downto 0); LCD_time_min_low : out std_logic_vector(7 downto 0); LCD_time_sec_high : out std_logic_vector(7 downto 0); LCD_time_sec_low : out std_logic_vector(7 downto 0); LCD_time_sec_colon : out std_logic_vector(7 downto 0)); end component; 모바일컴퓨터특강

  17. Digital Watch – Top Level Entity (6) begin U1: statemachine port map( Hz100, reset, set_shot, initial_state, time_ampm_set_state, time_hour_set_state, time_min_high_set_state, time_min_low_set_state, normal_time_state, time_set_mode); U2: timecount port map( Hz100, reset, inc_shot, set_shot, initial_state, time_ampm_set_state, time_hour_set_state, time_min_high_set_state, time_min_low_set_state, normal_time_state, time_ampm, time_hour_high, time_hour_low, time_min_high, time_min_low, time_sec_high, time_sec_low, buzzer_blink ); U3: ledblink port map( Hz100, reset, set_shot, inc_shot, initial_state, time_set_mode, led_blink); U4 :Hz100ctrl port map( clk,reset,Hz100); U5: shotpulse port map( Hz100, reset, set_button, set_shot ); U6: shotpulse port map( Hz100, reset, inc_button, inc_shot ); reset <= not(reset_sw); set_button <= (set_sw) and not(inc_sw); inc_button <= not(set_sw) and inc_sw; U7: ToLCDBlink port map( initial_state, time_ampm_set_state, time_hour_set_state, time_min_high_set_state, time_min_low_set_state, normal_time_state, led_blink, time_ampm, time_hour_high, time_hour_low, time_min_high, time_min_low, time_sec_high, time_sec_low, LCD_time_ampm_ap, LCD_time_ampm_m, LCD_time_hour_high, LCD_time_hour_low, LCD_time_min_high, LCD_time_min_low, LCD_time_sec_high, LCD_time_sec_low, LCD_time_sec_colon); U8: LCD_IF port map(clk, reset, LCD_time_ampm_ap, LCD_time_ampm_m, LCD_time_hour_high, LCD_time_hour_low, LCD_time_min_high, LCD_time_min_low, LCD_time_sec_high, LCD_time_sec_low, LCD_time_sec_colon, e, rw, rs, data ); end a; 모바일컴퓨터특강

  18. Digital Watch - Shot Pulse Gen. • 외부에서 입력되는 키의 신호는 모두 클럭 100Hz에 비동기인 신호 • 실제 회로 내부에서 필요한 신호는 동기신호 이므로 동기처리 후 Shot Pulse를 만들어야 한다 100Hz Clk에 비동기 입력 Clk에 동기 됨 입력신호가 1로 들어오면 100Hz의 1주기동안 1인 신호 모바일컴퓨터특강

  19. Digital Watch - Shot Pulse Gen. -- purpose : rising shot pulse generator LIBRARY IEEE; USE IEEE.std_logic_1164.all; entity shotpulse is port( clk : in std_logic; reset : in std_logic; d : in std_logic; rising_shot : out std_logic ); end shotpulse; architecture a of shotpulse is signal qa,qb : std_logic; begin process(clk,reset) begin if(reset='0') then qa<='0';qb<='0'; elsif(clk'event and clk='1') then qa<= d; qb<=qa; end if; end process; rising_shot <= qa and not(qb); end a; 모바일컴퓨터특강

  20. Digital Watch - 100Hz Gen. • 12MHz Clock(=clk)으로부터 1/100초인 100Hz(=Hz100)을 만드는 회로 10KHz 100Hz는 1/100초이므로 Stop Watch의 1/100초를 카운트하는데 사용되는 클럭으로 사용된다. TimeControl 블록과 KeyIF의 클럭으로 사용됨 10KHz:100Hz=100:1 그러므로 10KHz가 100주기 발생할 때 100Hz는 1주기 발생하면 된다. 모바일컴퓨터특강

  21. Digital Watch - 100Hz Gen. Clk=10KHz library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; entity Hz100ctrl is port( clk, nclr : in std_logic; Hz100 : out std_logic); end Hz100ctrl; architecture a of Hz100ctrl is signal cnt : std_logic_vector(5 downto 0); signal sHz100 : std_logic; Begin process(nclr,clk) begin if( nclr='0') then cnt <="000000"; elsif(clk'event and clk='1') then if(cnt=49) then cnt <= "000000"; else cnt <= cnt+'1'; end if; end if; end process; process(nclr,clk) begin if( nclr='0') then sHz100 <='0'; elsif(clk'event and clk='1') then if(cnt=49) then sHz100 <= not sHz100; end if; end if; end process; Hz100 <= sHz100; end a; Hz100=100Hz Modulo 50 Counter Cnt=49일 때마다 Hz100를 Toggle함 모바일컴퓨터특강

  22. Digital Watch - Mode Control(Flow) Input : Set_Shot Set_Shot은 입력 스위치인 Set Key를 누르면 클럭의 1주기 동안만 1이 되는 Shot Pulse 임. 0 S0 1 상태는 전부 6개로 나누어짐. S0 : Initial State S1 : AM/PM Setting State S2 : Hour Setting State S3 : Minute High Setting State S4 : Minute Low Setting State S5 : Normal Time State 0 S1 1 S1, S2, S3, S4는 시간 수정 Mode임. 0 S2 1 0 S3 1 상태도 설명 : 초기에 전원이 인가되면 S0에서 부터 시작한다. Set_Shot 신호가 1이 입력될 때마다 다음 상태로 천이 되며, 0 입력이면 상태를 그대로 유지한다. 시간 수정모드의 마지막 상태인 S4에서 Set_Shot이 1로 들어오면, 상태는 정상적인 시간이 진행되는 S5로 천이 된다. S5상태에서 Set_Shot이 1로 입력되면 상태는 시간 수정모드의 시작인 S1으로 다시 천이 되고 AM/PM 값의 수정을 시작한다. 0 S4 1 1 0 S5 모바일컴퓨터특강

  23. Digital Watch - Mode Control(Flow) -- purpose : mode control. ver2 LIBRARY IEEE; USE IEEE.std_logic_1164.all; USE IEEE.std_logic_unsigned.all; entity statemachine is port( clk : in std_logic; reset : in std_logic; set_shot : in std_logic; initial_state : out std_logic; time_ampm_set_state : out std_logic; time_hour_set_state : out std_logic; time_min_high_set_state : out std_logic; time_min_low_set_state : out std_logic; normal_time_state : out std_logic; time_set_mode : out std_logic ); end statemachine; architecture a of statemachine is signal cnt : std_logic_vector(2 downto 0); signal decout : std_logic_vector(5 downto 0); begin 출력신호:각각의 상태를 출력함 Time_set_mode는 시간수정모드인 경우에 1을 출력함. 모바일컴퓨터특강

  24. Digital Watch - Mode Control(Flow) process(clk,reset) begin if(reset='0') then cnt <= "000"; elsif(clk'event and clk='1') then if(set_shot ='1') then if(cnt="101") then cnt <= "001"; else cnt <= cnt+'1'; end if; end if; end if; end process ; process(cnt) begin case cnt is when "000" => decout <= "100000"; when "001" => decout <= "010000"; when "010" => decout <= "001000"; when "011" => decout <= "000100"; when "100" => decout <= "000010"; when others => decout <= "000001"; end case; end process ; Counter를 이용한 State Machine 구현 Cnt의 값을 Decoding 모바일컴퓨터특강

  25. Digital Watch - Mode Control(Flow) initial_state <= decout(5); time_ampm_set_state <= decout(4); time_hour_set_state <= decout(3); time_min_high_set_state <= decout(2); time_min_low_set_state <= decout(1); normal_time_state <= decout(0); time_set_mode <= decout(4) or decout(3) or decout(2) or decout(1) ; end a; 각각의 State를 출력함. Time_set_mode는 시간수정모드인 경우에 1을 출력함. 모바일컴퓨터특강

  26. Digital Watch - Time Control 시간 수정모드에서의 Flow AM/PM 수정모드 Hour 수정모드 분 10의자리 수정모드 분 1의자리 수정모드 9시 12시 50분 9분 모바일컴퓨터특강

  27. Digital Watch - Time Control 시간진행모드에서의 Flow 1초= time_Cnt=25 & Buzzer_Blink=1 9초 59초 9분59초 59분59초 9시59분59초 12시59분59초 11시59분59초 모바일컴퓨터특강

  28. Digital Watch - Time Control -- purpose : time counter control(revised 3) LIBRARY IEEE; USE IEEE.std_logic_1164.all; USE IEEE.std_logic_unsigned.all; entity timecount is port( clk : in std_logic; reset : in std_logic; inc_shot : in std_logic; set_shot : in std_logic; initial_state : in std_logic; time_ampm_set_state : in std_logic; time_hour_set_state : in std_logic; time_min_high_set_state : in std_logic; time_min_low_set_state : in std_logic; normal_time_state : in std_logic; -- time counters for 7 segment time_ampm : buffer std_logic; time_hour_high : buffer std_logic; time_hour_low : buffer std_logic_vector(3 downto 0); time_min_high : buffer std_logic_vector(2 downto 0); time_min_low : buffer std_logic_vector(3 downto 0); time_sec_high : buffer std_logic_vector(2 downto 0); time_sec_low : buffer std_logic_vector(3 downto 0); buzzer_blink : buffer std_logic -- for 0.5 sec buzer blink ); end timecount; 모바일컴퓨터특강

  29. Digital Watch - Time Control architecture a of timecount is CONSTANT AM : std_logic := '0'; CONSTANT PM : std_logic := '1'; signal time_cnt : std_logic_vector(5 downto 0); -- for 0.5 sec count signal sec_high5,sec_low9 : std_logic; signal min_high5,min_low9 : std_logic; signal hour_high1,hour_low1,hour_low2,hour_low9 : std_logic; signal sec_59 : std_logic; signal min_sec_959 : std_logic; signal min_sec_5959 : std_logic; signal hour_min_sec_95959 : std_logic; signal hour_min_sec_115959 : std_logic; signal hour_min_sec_125959 : std_logic; signal hour_12 : std_logic; signal one_sec : std_logic; begin sec_high5 <= time_sec_high(2) and time_sec_high(0); min_high5 <= time_min_high(2) and time_min_high(0); hour_high1 <= time_hour_high; sec_low9 <= time_sec_low(3) and time_sec_low(0); min_low9 <= time_min_low(3) and time_min_low(0); hour_low9 <= time_hour_low(3) and time_hour_low(0); hour_low1 <= time_hour_low(0); hour_low2 <= time_hour_low(1); sec_59 <= sec_high5 and sec_low9; min_sec_959 <= min_low9 and sec_59; min_sec_5959 <= min_high5 and min_sec_959; hour_min_sec_95959 <= hour_low9 and min_sec_5959; hour_min_sec_115959 <= hour_high1 and hour_low1 and min_sec_5959; hour_min_sec_125959 <= hour_high1 and hour_low2 and min_sec_5959; hour_12 <= hour_high1 and hour_low2; 모바일컴퓨터특강

  30. Digital Watch - Time Control process(clk, reset) begin if(reset='0') then time_ampm <= AM; elsif(clk'event and clk='1') then if( (time_ampm_set_state='1' and inc_shot='1') or (normal_time_state='1' and one_sec='1' and hour_min_sec_115959='1')) then time_ampm <= not(time_ampm); end if; end if; end process; process(clk, reset) begin if(reset='0') then time_hour_high <= '1'; elsif(clk'event and clk='1') then if( (time_hour_set_state='1' and inc_shot='1' and ( hour_low9='1' or hour_12='1') ) or (normal_time_state='1' and one_sec='1' and (hour_min_sec_95959='1' or hour_min_sec_125959='1') ) ) then time_hour_high <= not(time_hour_high); end if; end if; end process; 11시59분59초 9시 또는 12시 12시59분59초 9시59분59초 모바일컴퓨터특강

  31. Digital Watch - Time Control 9시 process(clk, reset) begin if(reset='0') then time_hour_low <= "0010"; elsif(clk'event and clk='1') then if( (time_hour_set_state='1' and inc_shot='1' and hour_low9='1') or (normal_time_state='1' and one_sec='1' and hour_min_sec_95959='1') )then time_hour_low <= "0000"; elsif( (time_hour_set_state='1' and inc_shot='1' and hour_12='1') or (normal_time_state='1' and one_sec='1' and hour_min_sec_125959='1') ) then time_hour_low <= "0001"; elsif( ( time_hour_set_state='1' and inc_shot='1') or ( normal_time_state='1' and one_sec='1' and min_sec_5959='1' ) )then time_hour_low <= time_hour_low+'1'; end if; end if; end process; process(clk, reset) begin if(reset='0') then time_min_high <= "000"; elsif(clk'event and clk='1') then if( (time_min_high_set_state='1' and inc_shot='1' and min_high5='1') or (normal_time_state='1' and one_sec='1' and min_sec_5959='1' )) then time_min_high <= "000"; elsif( (time_min_high_set_state='1' and inc_shot='1') or (normal_time_state='1' and one_sec='1' and min_sec_959='1' ) )then time_min_high <= time_min_high+'1'; end if; end if; end process; 9시59분59초 12시 12시59분59초 59분59초 50분 59분59초 모바일컴퓨터특강 9분59초

  32. Digital Watch - Time Control process(clk, reset) begin if(reset='0') then time_min_low <= "000"; elsif(clk'event and clk='1') then if( (time_min_low_set_state='1' and inc_shot='1' and min_low9='1') or (normal_time_state='1' and one_sec='1' and min_sec_959='1' ) )then time_min_low <= "0000"; elsif( (time_min_low_set_state='1' and inc_shot='1' ) or (normal_time_state='1' and one_sec='1' and sec_59='1' ) )then time_min_low <= time_min_low+'1'; end if; end if; end process; process(clk, reset) begin if(reset='0') then time_sec_high <= "000"; elsif(clk'event and clk='1') then if(normal_time_state='1' and one_sec='1' and sec_59='1' ) then time_sec_high <= "000"; elsif(normal_time_state='1' and one_sec='1' and sec_low9='1' ) then time_sec_high <= time_sec_high+'1'; end if; end if; end process; 9분 9분59초 59초 59초 9초 모바일컴퓨터특강

  33. Digital Watch - Time Control process(clk, reset) begin if(reset='0') then time_sec_low <= "0000"; elsif(clk'event and clk='1') then if(normal_time_state='1' and one_sec='1' and sec_low9='1' ) then time_sec_low <= "0000"; elsif(normal_time_state='1' and one_sec='1' ) then time_sec_low <= time_sec_low+'1'; end if; end if; end process; process(clk,reset) -- time_cnt, buzzer_blink processing begin if(reset='0') then time_cnt <= "000000"; elsif(clk'event and clk='1') then if( time_min_low_set_state='1' and set_shot='1') then time_cnt <= “000000"; elsif( initial_state='1') then null; elsif(time_cnt = 49) then time_cnt<=“000000"; else time_cnt <= time_cnt+'1'; end if; end if; end process; 9초 1초 0.5초 모바일컴퓨터특강

  34. Digital Watch - Time Control process(clk,reset) begin if(reset='0') then buzzer_blink <= '0'; elsif(clk'event and clk='1') then if( time_min_low_set_state='1' and set_shot='1') then buzzer_blink <= '0'; elsif(time_cnt = 49) then buzzer_blink <= not( buzzer_blink); end if; end if; end process; process(time_cnt,buzzer_blink) begin if(time_cnt = 49 and buzzer_blink ='1' ) then one_sec <='1'; else one_sec <='0'; end if; end process; end a; 0.5초 1초 모바일컴퓨터특강

  35. Digital Watch – LedBlink (Flow) 이 블럭의 목적은 키가 눌러졌을 때마다 FND의 Display를 동기화 시키는데 목적이 있는 것임. 1. 시스템의 초기상태(Initial_State)에서는 Set Key만 센싱을 하게 되는데, Set Key가 눌러지면 눌러지는 시점에서부터 0.5초간 FND의 값을 Display를 ON하고 다음 0.5초간은 Display를 OFF 한다. 2. 시간을 고치는 시간수정모드(Time_Set_Mode) 에서는 Set Key나 Inc Key 2가지 입력 모두에 대해 센싱을 해서 어느 하나의 Key라도 눌러지면 그 시점에 동기를 맞춰 Display On 시점을 다시 조정해서 0.5초간은 Display ON하며 다음 0.5초간은 Display OFF를 반복한다. 3. Led_blink_cnt는 30초(Half_CnT)를 세기위한 카운터임. 4. Led_blink가 1이면 Display ON이며, 0이면 Display OFF의 상태임. 모바일컴퓨터특강

  36. Digital Watch - LedBlink -- purpose : led blink control LIBRARY IEEE; USE IEEE.std_logic_1164.all; USE IEEE.std_logic_unsigned.all; entity ledblink is port( clk : in std_logic; reset : in std_logic; set_shot : in std_logic; inc_shot : in std_logic; initial_state : in std_logic; time_set_mode : in std_logic; led_blink : buffer std_logic ); end ledblink; architecture a of ledblink is signal led_blink_cnt : std_logic_vector(5 downto 0); begin 모바일컴퓨터특강

  37. Digital Watch - LedBlink 초기상태(Initial_State)에서는 Set SW가 눌러졌을 경우에 Display를 켜기부터 시작, -- 0.5 sec led blink control process(clk,reset) begin if(reset='0') then led_blink_cnt <= "00000"; elsif(clk'event and clk='1') then if( initial_state='1' and set_shot='1') then led_blink_cnt <="00000"; elsif( time_set_mode='1' and (set_shot='1' or inc_shot='1')) then led_blink_cnt <="00000"; else if(led_blink_cnt=49)then led_blink_cnt <="00000"; else led_blink_cnt <= led_blink_cnt+'1'; end if; end if; end if; -- end clk'event end process; 시간수정모드(Time_Set_Mode)에서는 Set Sw나 Inc Sw가 눌러지는 경우에 Display를 켜기부터 시작함. Led_blink_Cnt 는 30초씩 깜박임 조절을 위해 30초(Half_CnT)를 세기위한 카운터임. 그러므로 Display를 새로이 하기위해서는 위의 두가 지 경우에 0부터 다시 카운트 되어야 함. 모바일컴퓨터특강

  38. Digital Watch - LedBlink 초기상태(Initial_State)에서는 Set SW가 눌러졌을 경우에 Display를 켜기 위해 Led_Blink=1로 만듬. process(clk,reset) begin if(reset='0') then led_blink <='0'; elsif(clk'event and clk='1') then if( initial_state='1' and set_shot='1') then led_blink <= '1'; elsif( time_set_mode='1' and (set_shot='1' or inc_shot='1')) then led_blink <= '1'; elsif(led_blink_cnt=49)then led_blink <= not(led_blink); end if; end if; end process; end a; Led_blink가 1이면 Display ON이며, 0이면 Display OFF의 상태임. 시간수정모드(Time_Set_Mode)에서는 Set Sw나 Inc Sw가 눌러지는 경우에 Display를 켜기 위해 Led_Blink=1로 만듬. 0.5초가 지나면 Led_Blink를 Toggle해서 깜박임 조절함. 모바일컴퓨터특강

  39. Digital Watch – LCD_IF library ieee; use ieee.std_logic_1164.all; use ieee.std_logic_unsigned.all; use work.myLCD.all; entity LCD_IF is port( clk : in std_logic; -- 10KHz : 0.1msec = 100usec resetb : in std_logic; -- LCD input : time information LCD_time_ampm_ap : in std_logic_vector(7 downto 0); LCD_time_ampm_m : in std_logic_vector(7 downto 0); LCD_time_hour_high : in std_logic_vector(7 downto 0); LCD_time_hour_low : in std_logic_vector(7 downto 0); LCD_time_min_high : in std_logic_vector(7 downto 0); LCD_time_min_low : in std_logic_vector(7 downto 0); LCD_time_sec_high : in std_logic_vector(7 downto 0); LCD_time_sec_low : in std_logic_vector(7 downto 0); LCD_time_sec_colon : in std_logic_vector(7 downto 0); e : out std_logic; rw : out std_logic; rs : out std_logic; data : out std_logic_vector(7 downto 0) ); end LCD_IF; architecture hb of LCD_IF is signal dsp_data : std_logic_vector(7 downto 0); signal clk2 : std_logic; -- 5KHz : 0.2msec = 200usec signal Fclk2 : std_logic; -- 5KHz : 0.2msec = 200usec signal LCD_mode : std_logic_vector(3 downto 0); signal cnt5 : std_logic_vector(4 downto 0); -- modulo 21 counter signal Func_Set_shot : std_logic; signal Normal_Mode : std_logic; signal Write_shot : std_logic; signal Line : std_logic_vector(1 downto 0); -- 2 bits counter begin 입력클럭 clk=100us ASCII Code로 표시된 시간 정보 LCD의 제어를 위한 출력 모바일컴퓨터특강

  40. Digital Watch – LCD_IF process(clk, resetb) -- modulo 2 counter gen. begin if(resetb='0') then clk2 <= '0'; elsif( clk='1' and clk'event )then clk2 <= not clk2; end if; end process; process(clk, resetb) begin if(resetb='0') then Fclk2 <= '0'; elsif( clk='0' and clk'event )then Fclk2 <= clk2; end if; end process; process(clk2, resetb) -- modulo 21 counter gen. begin if(resetb='0') then cnt5 <= "00000"; elsif( clk2='1' and clk2'event )then if(cnt5 = "10100") then cnt5 <= "00000"; else cnt5 <= cnt5 + "00001"; end if; end if; end process; process(clk2, resetb) -- Line Counter gen. begin if(resetb='0') then Line <= "00"; elsif( clk2='1' and clk2'event )then if( cnt5 = "10100" ) then -- when cnt5=20 ? Line <= Line + "01"; else Line <= Line; end if; end if; end process; 2분주회로 Clk2 = Fclk2 = 200us Modulo 21 Counter Line = 21x200us = 41us 모바일컴퓨터특강

  41. Digital Watch – LCD_IF process(clk2, resetb) -- LCD Mode Allocation begin if(resetb='0') then LCD_mode <= "0000"; elsif( clk2='1' and clk2'event )then if( cnt5 = "10100" and Line = "11" ) then -- when 21*4*0.2msec = 16.8msec interval if(LCD_mode = "1000") then LCD_mode <= "1000"; else LCD_mode <= LCD_mode + "0001"; end if; end if; end if; end process; process( LCD_mode ) begin if( LCD_mode = "1000") then Normal_Mode <= '1'; else Normal_Mode <= '0'; end if; end process; process( cnt5, Line, LCD_mode) -- Command Shot Pulse gen. begin if( cnt5 = "00000" and Line = "00" and (LCD_mode < "1000") and not (LCD_mode="0000")) then -- 16.8msec interval Func_Set_shot <= '1'; else Func_Set_shot <= '0'; end if; end process; 16.8msec마다 LCD_mode증가하고, 8이면 LCD_mode를 정지 LCD_mode의 값이 1-7인 범위일 떄, 16.8 ms마다 한번씩 Line=00미면서 cnt5=00000인 구간에서 Func_Set_shot를 1로 만듬. LCD_mode=8이면 Normal_Mode 로 함. 모바일컴퓨터특강

  42. Digital Watch – LCD_IF -- Write_Shot gen. process(Normal_Mode, cnt5) begin if(cnt5 = "00000" and Normal_Mode ='1') then Write_Shot <= '1'; else Write_Shot <= '0'; end if; end process; rw <= '0'; -- write only rs <= not ( Func_Set_shot or Write_Shot ); e <= ( Func_Set_shot or Normal_Mode) and Fclk2; process( LCD_mode ) begin case LCD_mode is when "0001" => data<="00111100"; -- Function Setting when "0010" => data<="00111100"; when "0011" => data<="00111100"; when "0100" => data<="00111100"; when "0101" => data<="00000001"; -- Display Clear when "0110" => data<="00000110"; -- Entry Mode Setting when "0111" => data<="00001100"; -- Display On/Off setting when "1000" => data<= Dsp_Data; when others => data<="00000000"; end case; end process; Write Only Mode. E, RS발생 RS는 200us동안만 0, E는 100usec동안만 1로 만듬. LCD 초기화 과정 모바일컴퓨터특강

  43. Digital Watch – LCD_IF process(clk) begin if( Line = "00") then case cnt5 is when "00000" => dsp_data <="10000000"; -- DD Ram Addr = 00H when "00100" => dsp_data <= Ascii_D; when "00101" => dsp_data <= Ascii_I; when "00110" => dsp_data <= Ascii_G; when "00111" => dsp_data <= Ascii_I; when "01000" => dsp_data <= Ascii_T; when "01001" => dsp_data <= Ascii_A; when "01010" => dsp_data <= Ascii_L; when "01100" => dsp_data <= Ascii_W; when "01101" => dsp_data <= Ascii_A; when "01110" => dsp_data <= Ascii_T; when "01111" => dsp_data <= Ascii_C; when "10000" => dsp_data <= Ascii_H; when others => dsp_data <= Ascii_space; end case; else LCD 첫번째 라인 출력 DIGITAL WATCH 모바일컴퓨터특강

  44. Digital Watch – LCD_IF case cnt5 is when "00000" => dsp_data <="11000000"; -- DD RAM addr = 40H when "00100" => dsp_data <= Ascii_T; --T when "00101" => dsp_data <= Ascii_I; --I when "00110" => dsp_data <= Ascii_M; --M when "00111" => dsp_data <= Ascii_E; --E when "01000" => dsp_data <= Ascii_colon; --: when "01001" => dsp_data <= LCD_time_ampm_ap; when "01010" => dsp_data <= LCD_time_ampm_m; when "01100" => dsp_data <= LCD_time_hour_high; when "01101" => dsp_data <= LCD_time_hour_low ; when "01110" => dsp_data <= Ascii_colon; --: when "01111" => dsp_data <= LCD_time_min_high ; when "10000" => dsp_data <= LCD_time_min_low ; when "10001" => dsp_data <= LCD_time_sec_colon ; when "10010" => dsp_data <= LCD_time_sec_high ; when "10011" => dsp_data <= LCD_time_sec_low ; when others => dsp_data <= Ascii_space; end case; end if; end process; end hb; LCD 두 번째 라인 출력 (예) TIME:AM 12:07:25 모바일컴퓨터특강

  45. Digital Watch– LCD_IF Timing 7번의 명령어를 세팅 후에 LCD에 문자를 써 넣는다. 16.8ms 16.8ms 16.8ms 16.8ms 16.8ms 16.8ms 16.8ms 16.8ms Entry Mode Setting Function Setting Function Setting Function Setting Function Setting Display Clear Display On/Off setting DD Ram Addr = 00H 16.8msec마다 rs, e를 하나씩 발생해서 Function Set. 모바일컴퓨터특강

  46. Digital Watch – LCD_IF Timing Cnt5는 Modulo 21 Counter Line은 Cnt5가 20일 때만 증가 모바일컴퓨터특강

  47. Digital Watch – LCD_IF Timing LCD_Mode는 Line=3이며, cnt5=20일 때만 증가 확대는 다음 쪽 Line은 cnt5=20일 때만 증가하며 Line=3 이 되면 0으로 증가 모바일컴퓨터특강

  48. Digital Watch – LCD_IF Timing LCD_Mode는 Line=3이며, cnt5=20일 때만 증가 4x21=84(clkx2) 84x0.2msec=16.8.msec LCD의 Setup Time, Hold Time을 만족함. 100usec 50usec 50usec 0.5 clk = 0.5 x 0.1msec=0.05msec=50usec 전원 켜진 후16.8msec지나서 rs, e를 하나 발생. 모바일컴퓨터특강

  49. Digital Watch – LCD_IF Timing DD Ram Addr = 00H 첫번째 라인에 해당되는 문자20개 써 넣기. 모바일컴퓨터특강

  50. Digital Watch – LCD_IF Timing 1번째의 명령어 : 00111100 Function Setting 모바일컴퓨터특강

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