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A Space-Efficient Flash Translation Layer for CompactFlash Systems

A Space-Efficient Flash Translation Layer for CompactFlash Systems. Jesung Kim, Jong Min Kim, Sam H. Noh, Sang Lyul Min and Yookun Cho IEEE Transactions on Consumer Electronics 2002 July 4 th , 2007 Speaker: Jinyoung Choi . Introduction | CompactFlash. CompactFlash

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A Space-Efficient Flash Translation Layer for CompactFlash Systems

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  1. A Space-Efficient Flash Translation Layer for CompactFlash Systems Jesung Kim, Jong Min Kim, Sam H. Noh, Sang Lyul Min and Yookun Cho IEEE Transactions on Consumer Electronics 2002 July 4th, 2007 Speaker: Jinyoung Choi

  2. Introduction| CompactFlash • CompactFlash • - originally developed as a type of data storage device used in portable electronic devices Loading a cf card into canon a95 Internal organization of a CompactFlash System CompactFlash prototype system

  3. Introduction| Motivation • Coarse grain address translation • Block-level address mapping • Management overhead for maintaining translation information ↓ • Fine grain address translation • page-level address mapping • Efficient in handling small size writes ⇒ Combination of the two different granularities for the better performance

  4. Introduction| Goal • Handling both small size writes and long sequential writes efficiently while limiting the size of SRAM needed for mapping purposes • Guaranteeing consistency of the stored data even after unexpected power-outages

  5. Background | FTL schemes • Page-level address translation • Page is unit of I/O • (+) efficient (flexible management) (-) a large SRAM for mapping table • Block-level address translation • Block is a erase unit • (+) a small SRAM ⇒ low cost! (-) less efficient (extra operation required), not guarantee consistency • Replacement-block scheme • Maintain write history between an original block and an updated block Operation examples of various FTL design schemes

  6. Log Block Scheme | The Log block • Data blocks vs. Log blocks ※ A certain log block is dedicated to only one data block !!

  7. Log Block Scheme | The Log block • Traces of the page updates for Block No.12 ⇒ 3 1 0 1 • A log block is allocated from the pool of free blocks • Incremental updates • For read operation, the log blocks have to be checked!! ⇒ for more efficient checking, maintaining a page-level mapping table for each log block in SRAM • Can always identify the page that contains the up-to-date copy of a logical page

  8. Log Block Scheme | Merge operation • When all the pages in the log block are consumed, reclamation process take place by merging the log block with the corresponding data block • Requires n-page read operations, n-page write operations and two-block erase operations (n: the number of pages per block) • two-block erase ⇒ produced one free block • Log block merge

  9. Log Block Scheme | Merge operation • When all the pages in a block are written sequentially starting from the first logical page to the last logical page • Requires n-page read operations, n-page write operations and one-block erase operations (n: the number of pages per block) • one-block erase ⇒ produced one free block (ideal efficiency) • Log block switch

  10. Log Block Scheme | Merge operation ※ Comparison of merge operations • Replacement block merge • Cleaning in a LFS

  11. Log Block Scheme | Map block • merge/switch operation ⇒ the mapping of the data block is changed (∴ Require an update to the mapping info.) • Map blocks (in flash memory) • Used to store a mapping table in dedicated blocks to enable faster startup and on-demand fetching • Organized at the page-level • Each page stores an incremental update of the mapping table • Map directory (in SRAM) • The map of the mapping table • Used to locate each portion of the mapping table stored in map blocks • Similar to the traditional two-level page table structure (except for the out-place-update)

  12. Log Block Scheme | Map block • Mapping information managements The updates of three mapping table entries can be performed in a single write operation to the map block ⇒ assures consistency of the mapping table even when the power goes down at an unexpected time

  13. Performance Evaluation • Performance metrics : the number of extra erase/write operation

  14. Performance Evaluation • The x-axis : the number of extra blocks ( = the number of additional physical blocks reserved for replacement blocks, log blocks, free blocks, and map blocks) • The y-axis : the number of extra erase/write operations • the number of extra erase operations = (the number of erase operations that are performed by the scheme under evaluation) – (the number of erase operations from an ideal scheme) • Cf. ideal scheme : scheme that performs one erase operation for every n-page write requests • The main sources of extra erase operations : pages left unused, consumption of a free block • the number of extra write operations = (the number of write operations performed by the scheme under evaluation) – (the number of page writes requested from the host) • The main sources of extra write operations : the pages copied when merge/clean operations are performed

  15. Performance Evaluation • Cf. wear-leveling characteristics of the log block scheme

  16. Conclusion (Contribution 1) Handling both small size writes and long sequential writes efficiently while limiting the size of SRAM needed for mapping purposes ⇒ achieved by using page-level mapping in “log blocks” for small size writes, while block-level mapping for long sequential writes (Contribution 2) Guaranteeing consistency of the stored data even after unexpected power-outages ⇒ achieved by performing updates of mapping information in a single atomic write operation in dedicated blocks, “map blocks”

  17. References [1] Mendel Rosenblum, John K. Ousterhout, “The Design and Implementation of a Log-Structured File System,” ACM Transactions on Computer Systems,1992 [2] Adam Dunkels, Niclas Finne, Joakim Eriksson, and Thiemo Voigt, “Run-Time Dynamic Linking for Reprogramming Wireless Sensor Networks,” In Proceedings of the Fourth ACM Conference on Embedded Networked Sensor Systems,2006 [3] Silberschatz, Galvin, Gagne, Operating System Concepts, Wiley

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