A Space-Efficient flash translation layer for compact-flash systems

1. A Space-Efficient flash translation layer for compact-flash systems 김 동 현

2. Contents • Introduction • Background • An FTL Design Based on Log Blocks • Performance Evaluation • Conclusion

3. Introduction • Compact Flash • Originally developed as a type of data storage device used in portable electronic devices

4. +누구? Introduction • Coarse-grain address translation • Block-level address mapping • Management overhead for maintaining translation information • Fine-grain address translation • Page-level address mapping • Efficient in handling small size writes • Combination of the two different granularities for the better performance

5. Introduction • Handling both small size writes and long sequential writes efficiently while limiting the size of SRAM needed for mapping purposes • Guaranteeing consistency of the stored data even after unexpected power-outages

6. Background • Page-level address translation • Page is unit of I/O • Efficient (flexible management) • A large SRAM for mapping table • Block-level address translation • Block is a erase unit • A small SRAM low cost • Less efficient, not guarantee consistency • Replacement-block scheme • Maintain write history between an original block and an updated block

7. An FTL Design Based on Log Blocks

8. An FTL Design Based on Log Blocks • Merge Operation • Log Block Merge Data Block Data Block Free Block Log Block valid valid valid valid valid valid valid valid Free blocks

9. An FTL Design Based on Log Blocks • Merge Operation • Log Block Switch Data Block Data Block Log Block valid valid valid valid valid valid valid valid Free blocks

10. An FTL Design Based on Log Blocks • Merge Operation • Replacement block merge Replacement blocks Data blocks valid valid valid valid valid valid valid valid Free blocks

11. An FTL Design Based on Log Blocks • Merge Operation • Cleaning in a Log File System New blocks Victim blocks valid valid valid Free blocks

12. An FTL Design Based on Log Blocks • Map blocks(in flash memory) • dedicated blocks to enable faster startup and on-demand fetching • Each page stores an incremental update of the mapping table • Map directory(in SRAM) • the map of the mapping table • Used to locate each portion of the mapping table stored in map blocks

13. An FTL Design Based on Log Blocks • The updates of three mapping table entries can be performed in a single write operation to the map block • Assures consistency of the mapping table even when the power goes down at an unexpected time

14. Performance Evaluation Wear-leveling characteristics of the log block scheme

15. Conclusion • Handling both small size writes and long sequential writes efficiently while limiting the size of SRAM needed for mapping purposes • Achieved by using page-level mapping in log block for small size writes, while block-level mapping for long sequential writes • Guaranteeing consistency of the stored data even after unexpected power-outages • Achieved by performing updates of mapping information in a single atomic write operation in dedicated blocks, map blocks

16. Q & A