1 / 21

PCCC Turbo Codes for IEEE 802.11n

PCCC Turbo Codes for IEEE 802.11n. B. Bougard; B. Van Poucke; L. Van der Perre {bougardb, vanpouck, vdperre}@imec.be Presented by Bert Gyselinckx IMEC/Wireless Research March 2004. Outline. Advanced FEC for WLAN Myths about Turbo-Codes Turbo Codes: preferred choice for WLAN. Outline.

hayden
Download Presentation

PCCC Turbo Codes for IEEE 802.11n

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript


  1. PCCC Turbo Codes for IEEE 802.11n B. Bougard; B. Van Poucke; L. Van der Perre {bougardb, vanpouck, vdperre}@imec.be Presented by Bert Gyselinckx IMEC/Wireless Research March 2004

  2. Outline • Advanced FEC for WLAN • Myths about Turbo-Codes • Turbo Codes: preferred choice for WLAN

  3. Outline • Advanced FEC for WLAN • Myths about Turbo-Codes • Turbo Codes: preferred choice for WLAN

  4. 8 4 Spectral Efficiency [bit/s/Hz] Add points ( Benedetto ) 2 1 1/2 Eb /No [dB] Advanced FECs get close to Shannon’s Limit 8 8 Shannon Limit Shannon Limit 4 4 Uncoded Uncoded Spectral Efficiency [bit/s/Hz] Spectral Efficiency [bit/s/Hz] QPSK QPSK Add points ( Add points ( Benedetto Benedetto ) ) 2 2 SCBC SCBC Regular Regular Irregular Viterbi+RS Viterbi+RS LDPC LDPC LDPC 1 1 PCCC PCCC 1/2 1/2 Eb Eb /No [dB] /No [dB]

  5. PCCC and LDPC are close competitors Performance

  6. PCCC and LDPC are close competitors Complexity > < Turbo: N: block size; v: constraint length LDPC: N: block size; M: code dimension; Nc: #ones per column of H; #ones per row of H

  7. Outline • Advanced FEC for WLAN • Myths about Turbo-Codes • Turbo Codes: preferred choice for WLAN

  8. Myth 1: PCCCs have poor performance with small blocksize

  9. Myth 2: PCCCs require code termination that reduces code rate Double termination Virtual termination

  10. Myth 3: PCCCs are power hungry Look at the average TX+RX DC power with adaptive modulation over a representative set of channel instances -5%

  11. Outline • Advanced FEC for WLAN • Myths about Turbo-Codes • Turbo Codes: preferred choice for WLAN

  12. PCCC assets • PCCC already recognized in several standards • Potential for low latency • Potential for low power • Flexibility • Unconstrained in blocksize (numerous interleaver sizes possible) • Any code rate achievable by puncturing • Code rate ‘compatible’ with CC scheme • Energy-Scalable architecture possible

  13. Parallel PCCC codec prototype Nominal clock frequency (max) 160 MHz (170.9 MHz) Nominal throughput (max) 75.6 Mb/s (80.7 Mb/s) Number of gates <400 K Total RAM area 36 Kbit Decoding Latency 5s Energy consumption <1.45 nJ/bit This holds for UMC .18 m technology. If mapped in .13 m, the architecture achieves easily 100Mbps with still less latency and energy consumption

  14. Flexibility makes integration in 802.11n easy • Interleaver size leading to an integer number of coded OFDM symbols without bit stuffing • Interleaver sizes = {128, 144, 192, 256, 288, 384, 432} • Code rate = {1/3, 1/2, 2/3, 3/4} • Virtual termination Interleaver size

  15. Energy-scalability improves the data rate versus energy consumption trade-off Total Rx energy per bit vs. net goodput

  16. Backup

  17. LDPC in a nutshell Parity check matrix c.HT=0 Tanner graph

  18. LDPC in a nutshell: decoding Sum-product algorithm

  19. s SISO 1 - c1 D D D DILV ILV ILV c2 ILV SISO 2 D D D - PCCC in a nutshell

  20. PCCC in a nutshell: decoding BCJR algorithm

  21. Key References [1] S. B. Wicker, S. Kim, Fundamentals of codes, graphs and iterative decoding, Kluwer Academic Publishers, 2003 [2] A. Giulietti, B. Bougard, L. Van der Perre, Turbo Codes, Desirable and Designable, Kluwer Academic Publisher, 2003 [3] R. G. Gallager, Low Density Parity-Check Codes, Cambridge, MA: MIT Press, 1963 [4] G. Berrou, A. Glavieux, P. Thitimajshima, “Near Shannon limit error-correcting coding and decoding: Turbo Codes”, in Proc. Int. Conf. Commun., Geneva, Switzerland, May 1993 pp. 1064-1070. [5] C. Schurgers et al., "Memory Optimization of MAP Turbo Decoder Algorithms,“, IEEE Transactions on VLSI Systems, Vol.9, No.2, pp. 305-312, April 2001. [6] A. Giulietti et al., "Parallel turbo code interleavers : avoiding collisions in accesses to storage elements", Electronics Letters, Vol. 38 No. 5, Feb. 2002 [7] Thul, M.J.; Gilbert, F.; Wehn, N, "Concurrent interleaving architectures for high-throughput channel coding”, in Proc. IEEE ICASSP 2003, Vol. 2 , pp.  6-10 April 2003 [8] B. Bougard et al., “A Scalable 837nJ/bit 75Mb/s Parallel Concatenated Convolutional (Turbo-) CODEC”, IEEE International Solid-State Circuits Conference, Digest of Technical Papers, Vol. 1., pp.152 - 484, San Francisco, CA, Feb. 2003 [9] D. J. C. Mac Kay, “Good error correcting codes based on very sparse matrices”, IEEE Trans. Inform. Theory, vol. 45, pp. 399-431, Mar. 1999 [10] T. Richardson and R. Urbanke, “Efficient encoding of Low-density parity-check codes”, IEEE Trans. Inform. Theory, vol. 47, pp. 638-656, Feb. 2001

More Related