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Chapter 4 Digital Transmission

Chapter 4 Digital Transmission. Physical Layer Issues. DIGITAL-TO-DIGITAL CONVERSION. Conversion of digital data to digital signals The conversion involves three techniques: line coding – converting bit sequences to digital signals block coding – adding redundancy for error detection

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Chapter 4 Digital Transmission

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  1. Chapter 4Digital Transmission Physical Layer Issues Chapter 4

  2. DIGITAL-TO-DIGITAL CONVERSION Conversion of digital data to digital signals The conversion involves three techniques: line coding – converting bit sequences to digital signals block coding – adding redundancy for error detection scrambling– deals with the long zero-level pulse issue Line coding is always needed; Block coding and scrambling may or may not be needed. Chapter 4

  3. Line coding and decoding At Tx - Digital data represented as codes is converted to a digital signal via an encoder At Rx – Digital signal is converted back to digital codes via a decoder Chapter 4

  4. Data and Signal Elements • Data element - smallest entity representing data • Signal element – shortest unit of a digital signal • Data communications - a signal element carries data elements • r – is the ratio of # of data elements carried per signal element Chapter 4

  5. Signal element versus data element Chapter 4

  6. Data Rate vs Signal Rate Data rate (or bit rate) - # of data elements (or bits) transmitted in 1 second – bits-per-second Signal rate (pulse rate or baud rate) - # of signal elements transmitted in 1 second – baud is the unit Goal: increase data rate while decreasing signal rate Worst Case Scenario – we need the maximum signaling rate (alternating 1/0s) Best Case Scenario – we need the minimum signaling rate (all 1s or 0s) Focus on average case Chapter 4

  7. Computing the Signal Elements S = c × N × 1/r N data rate (bps) c case factor S # of signal elements r ratio of data to signal Chapter 4

  8. Example A signal is carrying data in which one data element is encoded as one signal element ( r = 1). If the bit rate is 100 kbps, what is the average value of the baud rate if c is between 0 and 1? Solution We assume that the average value of c is 1/2. The baud rate is then Chapter 4

  9. Bandwidth Baud rate - # of carriers on the transport Data rate - # of bits in the carriers With this, we clearly see that baud rate effects bandwidth usage Signaling changes relate to frequency changes – therefore the bandwidth is proportional to the signal rate: Bmin = c × N × 1/r minimin banwidth or Nmax = 1/c × B × r for maximum data rate (given the bandwidth) Chapter 4

  10. Example The maximum data rate of a channel (see Chapter 3) is Nmax = 2 × B × log2 L (defined by the Nyquist formula). Does this agree with the previous formula? Solution A signal with L levels actually can carry log2L bits per level. If each level corresponds to one signal element and we assume the average case (c = 1/2), then we have Chapter 4

  11. Decoding Issue 1 The Rx decodes the digital signal – how is it done ? • Rx determines a “moving average” of the signal’s power or voltage levels • This average is called the baseline • Then the Rx compares incoming signal power to this average (or baseline) • If higher than the baseline, could be a 1 • If lower than the baseline, could be a 0 • In using such a technique, is it intuitive that long runs of 0s or 1s could skew the average (baseline) ? – this is called baseline wandering (effects Rx’s ability to decode correctly) Chapter 4

  12. Decoding Issue 2 Effect of lack of synchronization For the Rx, to correctly read the signal, both the Tx and Rx “bit intervals” must be EXACT Example of Rx timing off - decoding the wrong data from the signal Chapter 4

  13. Example In a digital transmission, the receiver clock is 0.1 percent faster than the sender clock. How many extra bits per second does the receiver receive if the data rate is 1 kbps? How many if the data rate is 1 Mbps? Solution At 1 kbps, the receiver receives 1001 bps instead of 1000 bps. At 1 Mbps, the receiver receives 1,001,000 bps instead of 1,000,000 bps. NOTE: A FASTER clock means SHORTER intervals Chapter 4

  14. Synchronization Fix To fix this, the Tx can insert timing info into the data that synchs the Rx to the start, middle and end of a pulse – these points could reset an out-of-synch Rx Chapter 4

  15. Line Coding Scheme Categories Chapter 4

  16. Unipolar NRZ Scheme Voltages on one side of the axis Positive voltage signifies 1 Almost zero voltage signifies 0 Power needed to send 1 bit unit of resistance Chapter 4

  17. Polar NRZ-L and NRZ-I Schemes change no change Voltages on both sides of the axis NRZ-L (level) version – voltage level determines the bit value NRZ-I (invert) version – voltage change or no-change determines the bit value (no change = 0, change = 1) Chapter 4

  18. Polar RZ Scheme Uses 3 values: positive, negative and zero Signal changes Not between bits BUT during the bit H-to-L in middle for 1 L-to-H in middle for 0 Positioning occurs at the beginning of the period Chapter 4

  19. Polar Biphase: Manchester and Differential Manchester Schemes Manchester: H-to-L=0, L-to-H=1 Differential Manchester: H-to-L or L-to-H at begin=0, No change at begin=1 Chapter 4

  20. Bipolar Schemes: AMI and Pseudoternary Bipolar encoding uses 3 voltage levels: positive, negative and zero. One data element is at ZERO, while the others alternate between negative and positive Alternate Mark Inversion (AMI) scheme – neutral zero voltage is 0 and alternating positive and negative voltage represents 1 Pseudoternary scheme – vice versa from the AMI scheme Chapter 4

  21. Multilevel Schemes These schemes attempt to increase the number of bits per baud Given m data elements, could produce 2m data patterns Given L levels, could produce Ln combinations of signal patterns If 2m = Ln, each data pattern is encoded into one signal pattern (1-to-1) Chapter 4

  22. Multilevel Schemes • If 2m < Ln, data patterns use a subset of signal patterns – could use the extra signal patterns for fixing baseline wandering and error detection • Classify these codes as mBnL where: m – length of the binary pattern B – means Binary data n – length of the signal pattern L # signaling levels (letters in place of L: B=2, T=3 and Q=4) Chapter 4

  23. Multilevel: 2B1Q scheme 2B1Q Data patterns of size 2 bits Encodes 2-bit patterns in one signal element 4 levels of signals If previous level was positive and the next level becomes +3, represents 01 If previous level was positive and the next level becomes -3, represents 11 Chapter 4

  24. Multilevel: 8B6T scheme Data patterns of size 8 bits Encodes 8-bit patterns in six signal elements Using 3 levels of signal Chapter 4

  25. Multilevel: 4D-PAM5 scheme 4-dimensional five-level pulse amplitude modulation scheme Instead of transmitting in serial form – parts of the code are in sent in parallel over 4 wires (versus 1 wire) In this particular case, it would take ¼ less time to transmit Chapter 4

  26. Multiline Transmission: MLT-3 scheme • Multi-line transmission, three-level scheme • Uses three levels and three transition rules to jump between levels: • if the next bit is 0, there is no transition • if the next bit is 1 and the current level is not 0, the next level is 0 • if the next bit is 1 and the current level is 0, the next level is the opposite of the last nonzero level Chapter 4

  27. Block Coding Block coding provides redundancy for synchronization and error detection Block coding changes a block of m bits into a block of n bits (where n>m) Block coding is also called mB/nB encoding Chapter 4

  28. Chapter 4

  29. Using block coding 4B/5B with NRZ-I line coding scheme Fixes that PROBLEM of long stream of 0s Use 4B/5B to change the long stream of 0s prior to using NRZ-I For example, for 4B/5B encoding, 4-bit groups or replaced with 5-bit groups and those 5-bit groups are re-combined – NOTE: the 5-bit code could be completely different from the original 4-bit code Chapter 4

  30. 4B/5B mapping codes Because the 5-bit code has 25 = 32 codes, the extra codes can be used for control sequences and error detection For example, for 4B/5B encoding, 4-bit groups or replaced with 5-bit groups and those 5-bit groups are re-combined – NOTE: the 5-bit code could be completely different from the original 4-bit code Chapter 4

  31. 8B/10B block encoding If there are more consecutive 0s over 1s (or vice versa), controller detects and complements either the 0s or 1s – uses 768 redundant bit groups for this Eight binary, ten binary encoding scheme 8-bit codes replaced with 10-bit codes Provide greater error detection 5 most significant bits are fed to 5B/6B encoder 3 least significant bits are fed to 3B/4B encoder Done to simplify mapping table Chapter 4

  32. Scrambling • The Biphase encoding schemes are not suited for long-distance communication due to bandwidth requirement. • However, bipolar AMI encoding is good because of the narrow bandwidth requirement – however, long streams of 0s could throw off the synchronization • In dealing with synchronization issue, we could substitute long zero-level pulses with a combination of other levels to provide synchronization • This is called scrambling Chapter 4

  33. AMI used with Scrambling Unlike block coding, scrambling is done at the SAME time encoding is done System inserts the require pulses based on “scrambling rules” Two techniques: (1) bipolar with 8-zero substitution (B8ZS), (2) high-density bipolar 3-zero (HDB3) Chapter 4

  34. Two cases of B8ZS scrambling technique Takes 8 consecutive zeros and replace with 000VB0VB where V denotes violation (a non-zero voltage not in accordance with the AMI rule) and B denotes bipolar (a non-zero voltage in accordance with AMI rule) Recall the Bipolar AMI scheme on page 110 [Alternate Mark Inversion (AMI) scheme – neutral zero voltage is 0 and alternating positive and negative voltage represents 1] Chapter 4

  35. Different situations in HDB3 scrambling technique For HDB3, 4 consecutive zeros are replaced with 000V or B00V With the two choices, an even number of non-zero pulses can be maintained Rule 1: if the # of non-zero pulses is odd after the last substitution, use pattern 000V – which will make the total number even Because # of non-zero pulses here is even, used B00V. Now we have only 1 non-zero pulse (odd), so use 000V Since there are no non-zero pulses after the 2nd substitution, the 3rd substitution is B00V because this is an even case Rule 2: if the # of non-zero pulses is even after the last substitution, use pattern B00V – which will make the total number even Chapter 4

  36. ANALOG-TO-DIGITAL CONVERSION We have seen in Chapter 3 that a digital signal is superior to an analog signal. The tendency today is to change an analog signal to digital data. In this section we describe two techniques: pulse code modulation delta modulation. Chapter 4

  37. Components of PCM encoder PCM – Pulse Code Modulation 1st: analog signal is sampled 2nd: sampled signal is quantized 3rd: quantized values are encoded as bit streams (or codes) Analog signal is sampled every Ts seconds Sample rate is fs = 1/Ts Chapter 4

  38. Three Sampling Methods for PCM High-speed switch used – ale to retain the shape of the signal Ideal but complex Sampling process also called pulse amplitude modulation (PAM) Sample-and-hold method that creates flat-top samples by using a circuit Chapter 4

  39. Recovery of a Sampled Sine Wave Nyquist theorem states that the sampling rate must be at least 2 times the highest frequency of the signal Catches the essence of the signal Doesn’t improve the case Doesn’t capture the essence of the signal Chapter 4

  40. Quantization and encoding of a sampled signal actual-amplitude/D actual amplitude • Quantization steps: • Determine Vmin and Vmax • Divide range into L zones, each of height D • D = [Vmin - Vmax]/L • 3. Assign quantized values of 0 to L-1 to midpoint of each zone • 4. Map the sample value to a quantized value Assume sample amplitudes between -20V and +20V Let L = 8 (levels) – therefore, D = [20 - -20]/8 = 5 Quantization error can contribute to Shannon’s SNR: SNRdB = 6.02nb + 1.76 where nb is bits per sample Bit rate = sampling rate × # of bits per sample = fs × nb Chapter 4

  41. Components of a PCM Decoder PCM decoder recovers the original signal Smooths out the staircase signal What is the minimum bandwidth of the filter the digitized signal will need ? Bmin = c x nb x 2 x Banalog x 1/r If 1/r=1 and c=1/2, Bmin=nb x Banalog If the data rate and number of signal levels are fixed, minimum bandwidth is Bmin = N / [2 x log2 L] Chapter 4

  42. The process of delta modulation PCM is more complex than Delta modulation PCM finds the amplitude of the signal; delta modulation simply finds the change in the signal from the previous sample Delta modulation doesn’t use codes – bits are sent one after another Positive changes are encoded as 1; negative changes are encoded as 0 Chapter 4

  43. TRANSMISSION MODES • The transmission of binary data across a link can be accomplished in either parallel or serial mode. • In parallel mode, multiple bits are sent with each clock tick. • In serial mode, 1 bit is sent with each clock tick. • While there is only one way to send parallel data, there are three subclasses of serial transmission: asynchronous, synchronous, and isochronous. Chapter 4

  44. Parallel transmission Chapter 4

  45. Serial transmission Chapter 4

  46. AsynchronousTransmission In asynchronous transmission, we send 1 start bit (0) at the beginning and 1 or more stop bits (1s) at the end of each byte. There may be a gap between each byte. Asynchronous here means “asynchronous at the byte level,” but the bits are still synchronized; their durations are the same. Chapter 4

  47. Synchronous transmission In synchronous transmission, bits are sent one after another without start or stop bits or gaps. It is the responsibility of the receiver to group the bits. Chapter 4

  48. Isochronous Transmission • For realtime audio and video, uneven delays between frames is not acceptable – so synchronous transmission doesn’t work well • The entire stream of bits must be synchronized – this is isochronous transmission • Isochronous transmission guarantees data at a fixed rate Chapter 4

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