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USB 2.0 Electrical Overview

May 16, 2000. 3. Highlights of the USB 2.0 Electrical Specification. High-speed signaling mode 480 Mb/sExisting cables and connectorsSeamless forward/backward compatibilityHigh-speed functionality smoothly layered" over existing USB 1.1Specifications for each element testable through the use

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USB 2.0 Electrical Overview

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    2. May 16, 2000 2 USB 2.0 Electrical Overview Jon Lueker Intel Corporation

    3. May 16, 2000 3 Highlights of the USB 2.0 Electrical Specification High-speed signaling mode 480 Mb/s Existing cables and connectors Seamless forward/backward compatibility High-speed functionality smoothly layered over existing USB 1.1 Specifications for each element testable through the use of required test modes

    4. May 16, 2000 4 USB 2.0 - An Extension of USB 1.1 All the functionality of USB 1.1 High-speed signaling mode Protocol for detecting high-speed capability Protocols for entering/exiting high-speed Mechanism for disconnect detection Low-/full-speed specifications tightened, but only for high-speed capable ports Section 7.2 (Power Distribution) specifications unchanged

    5. May 16, 2000 5 USB 2.0 is Interoperable with USB 1.1 All compliant USB 1.1 devices, hubs, and cables will work with new 2.0 host controllers USB 2.0 devices and hubs will work with 1.1 host controllers (but not at 480 Mb/s!) High-speed signaling is supported over compliant USB 1.1 cables and connectors

    6. May 16, 2000 6 Legacy USB Devices (Other than Hubs) Compliant USB 1.1 devices will generally be USB 2.0 compliant Exception: Low-speed devices with unshielded, captive cables USB 2.0 requires foil and drain wire in low-speed captive cables

    7. May 16, 2000 7 USB 2.0 High-speed Capable Devices Required to support full-speed signaling Required to at least enumerate in full-speed Required to meet tightened full-speed electrical specifications Must not support low-speed mode

    8. May 16, 2000 8 USB 2.0 Hubs and Host Controllers Required to support low, full, and high-speed modes on downstream facing ports Required to support full-/high-speed on upstream facing ports Required to support tightened low-/full-speed electrical specifications

    9. May 16, 2000 9 USB 1.1/2.0 Interoperability Matrix

    10. May 16, 2000 10 High-Speed Electrical Layer New signaling New transceiver elements New bus states New low-level protocols New test modes

    11. May 16, 2000 11 Differential Current Drive

    12. May 16, 2000 12 Source/Load Terminations Use of terminations at source and load enable high signal integrity Reflection coefficient = (RT - Z0) / (RT + Z0)

    13. May 16, 2000 13 USB 2.0 Dual Terminations Simulation assumes ideal transceivers and terminations Typical imperfections are modeled for cable, connectors, bond wires, etc. 2.7X increase in eye opening, 2.7X decrease in jitter

    14. May 16, 2000 14 Full-Speed Drivers Provide Terminations Full-speed drivers asserting SE0 look like resistance to ground ZDRV + RS = 45 Ohms, +/- 10% RS may be integrated on-die or placed off-chip

    15. May 16, 2000 15 Existing Cables and Connectors No changes to connector specifications Cable specs added to USB 1.1 guarantee performance, but pre-ECN cables will support high-speed

    16. May 16, 2000 16 DC Coupled Low-/full-speed modes require DC coupling DC coupling for high-speed simplifies board design and minimizes cost Worst case skin-effect losses still leave reliable eye opening Use of individual ferrite beads on D+ and D- lines no longer possible, but shielded low-speed cable requirement helps a lot

    17. May 16, 2000 17 High-Speed Signaling Is Only Sensed Differentially

    18. May 16, 2000 18 High-Speed Timing Regenerated in Repeater High-speed signaling incurs no cumulative jitter or degradation Bit errors and non-compliant behavior are easily isolated to a single link

    19. May 16, 2000 19 High-Speed Bus States/Levels

    20. May 16, 2000 20 USB 2.0 Transceiver Functionality

    21. May 16, 2000 21 High-Speed Current Driver Directing current to ground is fast but wastes power Turning current on/off saves power but requires settling time Use of these two options is left to the designer

    22. May 16, 2000 22 RPU Switch When device enters high-speed mode, RPU is disconnected It is recommended that switching elements be attached to both lines to achieve balanced parasitics

    23. May 16, 2000 23 High-Speed Differential Data Receiver Required to receive differential signaling with amplitude as small as +/- 200mV Guideline: Tolerant of common mode voltages from 50mV to +600mV Reception of data is qualified by envelope detection

    24. May 16, 2000 24 Transmission Envelope Detector Must indicate Squelch when differential amplitude is < 100mV Must indicate !Squelch when differential amplitude is > 150mV Must incorporate filtering to prevent indication of Squelch during crossover Should react in less than 4 bit times

    25. May 16, 2000 25 Disconnection Envelope Detector Disconnect threshold detector goes high when signals above disconnect threshold are detected Output is sampled during last 8 bits of 40 bit uSOF EOP This prevents spurious disconnect detection in the presence of allowable signaling overshoot

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