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Peripheral Design Options For USB 2.0 Solutions

May 8, 2001. 3. Concept to Production with USB 2.0. Product Prototyping PhaseGet something to work!Advanced prototyping optionsWhat are the best ways to optimize?Four options will be presented Mass Production PhaseLowest possible overall cost structure. There May Be Two ?Minimums". May 8, 200

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Peripheral Design Options For USB 2.0 Solutions

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    2. May 8, 2001 2 Peripheral Design Options For USB 2.0 Solutions Dave Thompson Manager of High Speed I/O Development Agere Systems, davethompson@agere.com

    3. May 8, 2001 3 Concept to Production with USB 2.0 Product Prototyping Phase Get something to work! Advanced prototyping options What are the best ways to optimize? Four options will be presented Mass Production Phase Lowest possible overall cost structure

    4. May 8, 2001 4 Product Prototyping Phase Important Elements Trusted Modular Components USB 2.0 transceiver daughter card PCI USB2.0 host adapter cards Analysis tools USB 2.0 bus protocol analyzer Logic analyzer/traffic generators Trusted hosts and peripherals Multiple lab setups is desirable Software Support Drivers; Apps; debug tools

    5. May 8, 2001 5 USB2.0 Prototyping In Action

    6. May 8, 2001 6 Advanced USB 2.0 Prototyping Options USB 2.0 Transceiver Macrocell Integrating analog circuits avoids issues later Demonstrated success at 480Mb/s signal rates Metal programmable/Rapid turn chips Standard digital logic options are easy NEW!--Could include integrated transceivers Board platforms for peripheral products Transceiver and processor based Board level platforms for host products PCI based single chips or FPGAs

    7. May 8, 2001 7 UTMI Transceiver Macrocell

    8. May 8, 2001 8 John Hydes Typical Implementation

    9. May 8, 2001 9 Building USB 2.0 Devices Use a discrete UTMI transceiver Has good TTM characteristics Concentrate on product function

    10. May 8, 2001 10 Discrete UTMI Transceiver Has to be a parallel interface on function side 8-bit parallel interface difficult to connect to Has to run at 60MHz Hard to do with FPGAs Pay attention to TxReady, Rx Valid & ValidH 16-bit parallel interface severely pin constrained Package cost dwarfs silicon cost Easy to connect to (runs at 30MHz) Add functionality to increase silicon value SIE, DMA, but that limits scope

    11. May 8, 2001 11 Discrete UTMI Transceiver

    12. May 8, 2001 12 Building USB2 Devices Use a generic device controller Has good TTM characteristics Interfaces to product function with general purpose bus interface Quickly enables existing product to USB 2.0

    13. May 8, 2001 13 Building USB2 Devices Use an Enhanced Device Controller Flexibility with integrated uP Lower cost for high volume product

    14. May 8, 2001 14 Building USB2 Devices Full ASIC design Longer design/qualification times Lowest cost for high volume product

    15. May 8, 2001 15 Decision Points for Mass Production When to use Integrated ASIC/ASSP Minimum board part count is important Familiar with ASIC/ASSP design flows Function can be added to existing ASIC/ASSP When to use Standalone Transceiver If integration risk is high--not so in USB 2.0 Gives added debug points of observation Volume may not justify integrated solution

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