1 / 3

HSSD Project Planning

HSSD Project Planning. Nuno Miguel Cardanha Paulino nuno.paulino@fe.up.pt PDEEC 2011-2012. Implementation Overview. Figure 1 – Overview of Local Memory Architecture. CPU ( Microblaze )  Runs application LMB Injector  Bus monitor/ modifier RPU Executes CDFGs No memory accesses.

jirair
Download Presentation

HSSD Project Planning

An Image/Link below is provided (as is) to download presentation Download Policy: Content on the Website is provided to you AS IS for your information and personal use and may not be sold / licensed / shared on other websites without getting consent from its author. Content is provided to you AS IS for your information and personal use only. Download presentation by click this link. While downloading, if for some reason you are not able to download a presentation, the publisher may have deleted the file from their server. During download, if you can't get a presentation, the file might be deleted by the publisher.

E N D

Presentation Transcript

  1. HSSDProjectPlanning Nuno Miguel Cardanha Paulino nuno.paulino@fe.up.pt PDEEC 2011-2012

  2. ImplementationOverview Figure 1 – Overview of Local Memory Architecture • CPU (Microblaze)  Runs application • LMB Injector  Bus monitor/modifier • RPU • Executes CDFGs • No memoryaccesses

  3. Memory Access ArchitectureProposal • Enchanced Injector • Explicitlystallthe CPU • Bus accessmultiplexing • Loader/Storer • Memorystimuli • Clock gate RPU whenFIFOsfull • 1 loadand 1 storeper • Loaderscheduling • Adapt RPU • Generate/accept data/addressatanyrow, orlimitloads/stores to first/lastrows • Loader FIFO notempty stall • Selectmemoryaccessbenchmarks • Vecsum, dotprod, max • Compare speedupswithCatapultC Figure 2 – Possible Memory access architecture

More Related