CERN, CT Workshop, ID Week, July 2 nd , 2007

1. Problems and solutions during the integration. Unconformities in the detector Claudia Gemme, CERN - INFN Genova CERN, CT Workshop, ID Week, July 2nd, 2007

2. Overall not working FE chips/modules • We have integrated and tested 'perfect' SQPs delivered by 154 and an 'almost perfect’ detector (before the services integration it had only 2 individual chips that do not work located in D2A (AVDD short) and in D3A (dead)). At the end of the Pixel Package integration, we have few additional failures. • Dead: L1 M3C has HV open connection most probably in a part of the type 0 cable that is not accessible to be repaired. • Dead ?: D2C M1 has a short between VDD and CKn. Poor communication is possible with the MCC. The module works with commercial LVDS driver that were used in the production sites (so it most probably was not detected during the module qualification) but not with the optoboard. It may be that proper settings of VDD and VDDC voltages could make it operating.

3. Recoverable?: L2 M4C had a dead PIN diode. As there were no easy solution to move the full group to a spare PP0, the single module has been added as the seventh module in a D3 sector. The module works fine but it could be difficult to be operated due to the services/interlock and a special mapping will be needed. • FE chip Dead: D3C M3 has an AVDD short on chip 7. Bondings of the chip have been pulled so the module is normally operating. Most likely we will have 2 out of 1744modules not operable in the detector and 3 single FE chips not working as well. No failure is located in the B-layer. Without taking into account the module/FE chip failures, the fraction of bad pixels should be less than 0.29%, 0.20%, 0.07% for the L2, L1 and L0 respectively and 0.1-0.2% in the disks. But no test has been done during the CT so we do not have any update after the integration.

4. But… • Even if at the end we have relatively few failures, the list of the problems is much longer than that and it affects any part of the detector and off-detector electronics. • Every failure should be documented in a Problem Database that we started using during the CT based on the standard e-log: https://atlpix01.cern.ch/elog/ProblemDataLog/?mode=threaded

5. Modules failures • The test of the modules is limited but powerful: • Check currents; • MCC basic functionality; • Digital injection in 270 pixels (3 stages) of FE0; • Analog injection in 270 pixels (3 stages) of FE0. • The test has not checked many wire-bondings that very unlikely may have been damaged in the integration operation. Whenever there was some suspect that the handling could have done some damage, we have fully checked them. Detected Problems: • Short CKn – VDD: as the module works with the LVDS commercial drivers, the defect is probably there since the qualification that had no specific test to verify such an unusual condition.

6. AVDD short: This is a well-known problem that especially effects AMS modules. The short is caused by some silicon fragments that are trapped between sensor and electronics. Almost all of them have been detected at the bare module level or at the very first test of the flex module. Few other modules have developed the AVDD syndrome during the qualification (after thermal cycles). • The two FE chips that do not work due to the AVDD syndrome in the detector (their bondings have been pulled to reduce the module analog current) developed the syndrome or after the loading on the disk (D2A) or just sitting for few months on the ITT as we checked after the EC were integrated (D3C). Partial statistics

7. Type0 failures • Damages in the strain reliefs: • L2_B14_S2 M2A many wires broken -> repaired • L2-B21-S1 M2A has AVDDsense open (added board at PP0) • D1A_B02_S1: 4 signals on 3 modules cut by fault and repaired • Other opens have not been found: • L2_B12_S2 M6C: AVDD_sense, DTO2n, Hvret; recovered at PP0 . • L1-B18-S1 M3C: No High Voltage • L2-B06-S1 M0 open DTO2n interrupted. Recovered by Swapping boards. • No damage in the potentially high risk zone close to the ELCO connector for the L2 Type 0 cables!

8. High resistance sense lines: final inventory • We have some lines that show a higher value than expected. • They were originally detected by the Keithley measuring a high resistance (~10-20 Ohms) then going down to ~ 3Ohm. • Almost all are located on type 0 cables of L2 (one on the SQP). • We decided to fix all of them shortening on the type 0 board at PP0. VDDr AVDDr

9. SQP row detector signal module Initial Meas@PP1 Second meas@PP1 location meas@PP0 before repair meas@PP1 after repair C12 5LT L2B5S1 AVDDr_5 M4 14 3.3 T0 2.0 1.8 C12 6LB L2B7S2 AVDDr_6 M1 10 3.5 T0 2.5 1.9 C34 2LB L2B12S2 AVDDr_3 M4 <20 - SQP - - C34 5LB L2B13S2 AVDDr_3 M4 9 4.1 T0 2.9 1.9 C78 5RT L2B21S1 AVDDr_6 M5 13 3.4 T0 A12 2LB L2B3S1 VDDr_6 M1 30 10 T0 9.2 2.0 A56 1RT L2B17S2 AVDDr_5 M4 10 3.5 T0 High resistance sense lines: final inventory

10. Optoboard failures • L2_B25_S1 M6C VCSEL single-channel VCSEL failure: Finally investigated connecting a power meter directly to the optoboard output. On the non-working channel the power was always <0.1uW (below threshold for the instrument used). The face of the VECSEL was visually inspected under microscope and nothing strange was seen. The conclusion is that the single channel is dead on the VCSEL array itself. The module has been recovered moving the full detector group to a spare PP0. • L2_B11_S1 M4A PIN single failure: No PIN current for this link but OTDR have not detected anything unusual between BOC and PP0. The module has been moved to a seventh disk slot. • ‘Slow turn on’ has been observed for some channels but it does not affect the operation (see Beate’s talk).

11. BOC failures • See Tobias Flick’s talk • One bad RX plugin (the worst channel) • Few Bad TX channels located in one single BOC. One channel dead during operation after BOC replacement! • It is hard to distinguish between an optoboard PIN channel dead and a TX channel dead (or a fiber failure). It is necessary to unplug the fiber at the BOC, eventually run the OTDR measurement to PP1 and try another TX… • We have a confusing example in A34 L2_B11_S1_A6_M4 in OP-P1R-B: PIN dead L2_B09_S1_A6_M2 in OP-P5L-B: TX dead

12. ROD failure • In the first SQP we found a module with no DCI arriving to the MCC (no command). But PIN current was fine and clock arrived to the module. • The first wrong conclusion was that the DCI was ‘lost’ from the optoboard to the PP0 slot as the PIN current was measured. The module was moved to a spare slot in the same PP0 (D3)….. • In the second SQP we found another module with the same problem and we interpreted as a BOC problem…. • In the third SQP we finally understood that it was a ROD problem! Btw, in the recieval test it was noticed that there was a bad soldering. • See entry here: https://twiki.cern.ch/twiki/bin/view/Main/AtlasSiliconROD_307

13. PP2 failure • High digital current in the module (1.3A instead of 0.3A). • It was traced to be a poor soldering in the backplane that was fixing just removing some boards to access and repair. • It could be much more difficult in the pit.

14. Monitoring at PP2

15. Monitoring at PP2 • Vmon of VDD seems to have a double peak (this was already been observed) and usually the higher Vmon are collected in the same board. • Trimmer setting is fine, only the calibration seems strange.

16. Type 2 cable failures Retracted pins. • We systematically inspected all the type 2 cables after having tested 6 SQPs. • 23 retracted pins in 24 LV cables and 2 retracted pins in 12 NTC cables. • Many of them fully latch but it is an on-going process…. • Only in two cases it has been observed measurements we did: a VDDC and a AVVD open

17. Unconformities • Some of the problems listed before have been solved by moving a full detector group to a location different from the original one or individual channels to a spare slot. • Overall we have only used a spare board. • The unconformities are in special version of table 0092 where everything but the unconformities is left: http://atlsr1.cern.ch/tdaqfiles/PixelPackage/Non-conformity-0092_v7.3.xls • Optical mapping in JF’s talk.

18. A side

19. C side