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USB Specification Rev. 2.0 - External Hot PnP

USB Specification Rev. 2.0 - External Hot PnP. Reference: USB Core Spec. 1.0 -1996. Jan. 1.1 -1998. Sept. 2.0 –2000. Apr. USB core spec. revision history. USB Core Spec. 2.0 - 2000 . Apr. Chap. 1-4: Introduction, Background and Arch. Overview Chap. 5,8:

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USB Specification Rev. 2.0 - External Hot PnP

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  1. USB Specification Rev. 2.0- External Hot PnP Reference: USB Core Spec. 1.0 -1996. Jan. 1.1 -1998. Sept. 2.0 –2000. Apr.

  2. USB core spec. revision history

  3. USB Core Spec. 2.0 - 2000. Apr. • Chap. 1-4: • Introduction, Background and Arch. Overview • Chap. 5,8: • Data Flow Model and Protocol Layer • Chap. 6,7: • Mechanical and Electrical • Chap. 9: • Device Framework • Chap. 10,11: • USB Host and Hub

  4. Part I: Architecture Overview Part II: Physical Layer - Mechanical & Electrical Part III: Protocol Layer - Packet, Transaction Part IV: Data Flow Model - Transfer, Frame Part V: Device Framework - Requests, Descriptors Part VI: USB Host - H/W & S/W Part VII: USB Hub - Hub Configuration & Requests Part VIII: USB 2.0 Addendum Agenda

  5. UBS-IF information: www.usb.org USB Developers web site: www.usb.org/developers/ USB-IF member site: www.usb.org/app/members/ USB device class spec: www.usb.org/developers/devclass.html Intel USB web site: developer.intel.com/technology/usb/index.htm Microsoft USB tech web site: www.microsoft.com/hwdev/usb/ USB On Line: www.usbstuff.com USB reference books: www.annabooks.com; www.amazon.com USB system architecture / MindShare, Inc., Don Anderson / Addison-Wesley USB Hardware & Software / Garney, Solari, Callahan, Jaff /Annabooks USB Peripheral Design / John Koon / Annabooks USB Design by Example / Intel, John Hyde / Wiley Email: luisusb@hotmail.com USB Implementers Forum& Information

  6. Architecture Overview Reference: USB Core Spec. 2.0 -Chap. 1-4

  7. USB Definition Universal SerialBus. A cable bus supports data exchange between host and a wide range of simultaneously accessible peripherals. Peripherals share USB bandwidth through a host-scheduled, token-based protocol. Simultaneously: Allows peripherals to be attached, configured, used, and detached while the host and other peripherals are in operation.

  8. ISA PNP-ISA PCI USB 1394 Interconnect Inside the box Outside the box IO MEM IRQ DMA IO MEM IRQ DMA IO MEM IRQ Bandwidth Bandwidth power Bandwidth power Resources Progressively easier for the end user Requires more and more HW/SW involvement PNP Evolution

  9. USB Target Applications

  10. Technical Goals • Provide Ease of Use • Hot plugging, no terminators, autoconfigurable, port consolidation • Realtime • TDM design Guarantees bandwidth and latency on USB • Low-Cost • Assymetric design resulting in very low-cost peripherals • Complexity in Host • Wide range of applications and optimal performance • Interactive devices, audio, telephony • Concurrency • Data transfer: adequate data rate, multiple streams

  11. Breadth of USB Peripherals Percent of USB in U.S. Retail Market for July 2000 % Market Share 100% 80% 60% 40% 20% 0% VideoConf ExternalFloppy Mice RacingWheels Scanners Ink JetPrinters FlashMemoryReaders Joy-sticks RemovableMedia Game-pads Peripheral Categories Source: PC Data (represents 55% of total U.S. retail market)

  12. Compliance Testing Improves User Experience Devices Tested at March ‘00 Compliance Workshop Printer 9% Mass Storage 17% Imaging 7% Audio 5% Other 11% Communication19% Hub 9% HID 23% Over 1000 Products on Integrators List; 90-100 More Added Every Workshop Real Issues are Resolved at the Workshops!

  13. Peripheral Desired BW Comments Conference Cameras 75-150Mbs Allows up to MPEG-2 quality without compression Scanners 50-100Mbs+ Higher resolution, more colors Printers 50-100Mbs+ Higher resolutions, more colors. Or elimination of line/page buffersallows lower cost External Storage Up to 240Mbs CD-RW, ZIP*, MO, Flash card reader, HDD, ... Broadband Connection 10-100Mbs Cable, DSL, Ethernet, HPNA, ... Supports High-SpeedPC Peripherals Supports Multiple High-Speed Peripherals Running Simultaneously * All other brands and names are the property of their respective owners

  14. USB is …… PC Connectivity Firewire is …… Consumer Connectivity USB vs. 1394 Perception

  15. USB 2.0 and 1394 USB(All Speeds) Printers, scanners, external storage, HID devices, mice, keyboard, digital still and PC video conf camera 1394 DV camcorders, D-VHS, HDTV, digital set-top, digital home A/V Consumer Digital A/V PC • USB 2.0 will be ubiquitous on all PCs (businessand consumer) • 1394 will be on many consumer PCs targeted at digital convergence with CE devices

  16. Architecture Overview- USB 1.1 vs. USB 2.0 Source: USB-IF Technical Presentations for October 2000 Conference

  17. Low level electricals for High Speed (HS) signaling Much higher bit rate (480Mb/s) requires new transmitter/receiver Hub changes for backward compatibility Features limit bandwidth impact of Full Speed (FS)and Low Speed (LS) devices on HS devices FS/LS devices consume a bit-rate equivalentof HS bandwidth USB 2.0: What Changed??

  18. Same host/device model Host is in charge Devices are inexpensive Same basic protocol Token, data, handshake Same device framework Descriptors Same software interfaces USBDI USB 2.0: What Didn’t Change?

  19. No changes for these SW pieces New development work for Host Controller Driver and Hub Driver No Changes to Existing Infrastructure Applications Device Drivers Hub Driver Bus Driver Host ControllerDriver Areas Needing Development Work USB 2.0 Software Stack

  20. Same power distribution and consumption 500ua suspend, 100ma unconfigured,500ma configured Same power management features Suspend/resume model unchanged Same topology management Hub features to handle connect, disconnect,enable, disable, … Same cables and connectors USB 2.0: What Didn’t Change? Continued

  21. Client Driver Client Driver System SW USB 2.0 Host Controller High Speed Only HS Hub USB 1.1 Hub USB 1.1 Device USB 1.1 Hub HS Device (2 x 12Mb/s Capacity) USB 1.1 Device Full/Low Speed Sample USB 2.0 Topology • Hub provides high-speed expansion (ala USB 1.1 hub) • Hub provides additional Full/Low speed bus(es)

  22. USB 2.0 Host Controller (HC) High-Speed Mode USB 1.1 HCs (Enhanced Interface) USB HC Enhanced HC Control Logic HC Control Logic/Data Buffering Enhanced Data Buffering Port 1 Port 2 Port N Port 1 Port 2 Port N Port Owner Control(s) Port Routing Logic Port 1 Port 2 Port N USB 2.0 Host Controller • Allows port functionality regardless of OS version • USB 1.1 OS will ‘just work’ as USB 1.1 ports • USB 1.1 HCs can go away over time • Replaced with integrated USB 2.0 Hub

  23. Hub controller same as USB1.1 Routing logic connects device to appropriate path USB 2.0 Hub High Speed only Hub Controller Transaction Translator HS Signal Repeater Routing Logic Full/Low Speed Port Port Port Port

  24. TT handles low/full speed transactions Driven with split transactions Start-Split Host tells Hub to initiate full/low speed transaction Complete-Split Host asks Hub for results of previous full/lowspeed transaction Transaction Translator (TT)

  25. Low/full speed devices use bit-rate equivalent of USB2.0 bandwidth 6Mbps classic camera (50% of classic) uses less than 2% of USB2.0 bandwidth (6Mbps/480Mbps) Bandwidth Usage

  26. HS Bus uSOF uSOF uSOF uSOF uSOF uSOF uSOF uSOF uSOF SS CS CS CS CS 125us SS = Start Split CS = Complete Split SOF SOF Full Speed Bus 1ms ISOCH IN Through a TT

  27. Two major changes for USB 2.0 Higher speed electricals Transaction translator in USB2.0 hub Backward compatibility Has little impact on HS bandwidth May even improve FS performance Summary

  28. Topology Physical Layer Packet Formats Transaction Formats Frame Structure Transfer Types Technical Overview

  29. Host Root hub Hub ports Function Hub Function Function Function USB Physical Topology • Host • Only one host in any USB system • May be implemented in a combination of H/W, F/W or S/W • Root hub is integrated to provide one or more attachment points • Hub ( one specific device) • Acts as a repeater and switch for low/full/high speed mode individually • Devices and End-points

  30. Tiered Star Topology

  31. Hub/Function Hub/Function Host/Hub Keyboard Monitor PC Pen Mouse Speaker Mic Phone Hub Function Function Function Function Function Hub

  32. USB USB Host Host Hub Hub 5m 5m 5m 5m 5m 5m 5m 5m 5m 5m Device Device

  33. Enumeration configuration and operation Detection of attachment and removal Providing power to attached devices Managing of control and data flow between host and devices USB Access via Tokens Host generates tokens based on transfers Logical connection from host to function Initiates transfer at high speed, full speed or low speed Isochrony guaranteed and managed by the host Split Transactions handling(FS/LS split) USB Host

  34. USB Hub Upstream Connectivity Downstream Connectivity Hub Repeater Hub Repeater Disabled port Enabled ports

  35. Provide Easy to Use Peripheral Connections Termination Hot Attach/Detach Detection and reporting High / Full / Low Speed Selection Port Control Status/change reporting Port Enable/Disable Reset and Resume Signaling Transaction Translator Support Full/Low speed devices While transmitting data between the host and the hub at high speed Power Distribution USB Hub

  36. Addressing for 127 functions 31 endpoints per function (IN,OUT separate) Logical Point-to-Point w/Host Host Logical Device Logical Device Logical Device Logical Device Logical Device Devices

  37. Physical Layer-Mechanical & Electrical Reference: USB Core Spec. 2.0 -Chap. 6,7

  38. 5 meters max VBus VBus D+ D+ ... D- D- ... GND GND Mechanical USB LOGO USB ICON

  39. Mechanical(Cont.)

  40. “Mini-B” connector Receptacle is 1/20 of standard “B” connector (volume) Plug is 1/6 of standard “B” connector (volume) Addressing PortableDevice Needs

  41. Cables Full Speed Low Speed Connectors Type A (To Upstream) Type B (To Downstream) Signaling USB Data Signaling Reset Signaling Resume Signaling Power Distribution Power Budgets Self-powered Devices Bus-Powered Devices Sections

  42. Reliable, Low Cost Physical Layer between Host, Hubs and Functions Data Communication Limited power distribution Dynamic attach-detach Define the USB Transceiver Characteristics Define the USB Topology Limitation Power Control During Suspend/Resume Voltage Drop/Droop Budget Objectives

  43. Connectors 4-Position with shielded housing Positive Retention Blind Mating Capabilities Numbering: Vcc, D-, D+, Vss Cables 28 AWG twisted pair for signaling (per 60mm-80mm) 20-28 AWG pair for power Shielding for high/full speed segments (Marking is required) Color: Red, White, Green, Black Power pair Differential Signal pair Connectors and Cables

  44. Limited Power Distribution Dynamic attach-detach Source Terminated, Source/Load Terminated 1.5Mb/sec, 12 Mb/Sec, 480Mb/sec R 2 D+ D+ F.S./L.S. USB F.S. USB Transceiver Transceiver R Twisted Pair Shielded 1 D- D- 5 Meters max. (45 Outputs) (45 Outputs)   Z =90   15% R 0 1 Hub Port 0 R =15K  Host or or 1 R =1.5K  Full Speed Function Hub Port 2 R 2 L.S. USB D+ D+ F.S./L.S. USB Transceiver Transceiver R Untwisted, Unshielded 1 D- D- Slow Slew Rate 3 Meters max. (45 Outputs)  Buffers R 1 R =15K  1 R =1.5K  Host or 2 Low Speed Function Hub Port USB Physical Layer

  45. Detected upon connection Pull up resistor on D- v.s. D+ Idle state is opposite that of high speed Signaling rate is 1.5 Mb/sec v.s. 12Mb Segments are isolated by Hub - No full/high speed signaling is propagated Unshielded, untwisted cables (Shielded and twisted recommend but not required) Minimize EMI suppression components Low Speed Physical Layer

  46. High-speed signaling mode – 480 Mb/s Existing cables and connectors Seamless forward/backward compatibility High-speed functionality smoothly “layered” over existing USB 1.1 (SE0) Specifications for each element testable through the use of required test modes HS Physical: Data Signaling Bus State Transceiver Eye Pattern Resetting Connect/Disconnect SOP/EOP/Packet Chirping/Speed detection Suspend/Resume Highlights of the USB 2.0 Electrical Specification

  47. VOL < 0.3V ; 3.6V > VOH > 2.8V @ appropriate Rload VIL < 0.8V ; VIH(driven) > 2.0V 2.7V < VIHZ(floating) < 3.6V Output Tri-state to achieve bi_directional half-duplex High Impedance for hot insert, power down connect AC stress: Signal pins voltage tolerate -1.0V~4.6V source with an output impedance of 39 Impedance Balanced in both High and Low state to minimize signal skew Driver DC Characteristics(FS/LS)

  48. R 2 D+ D+ F.S./L.S. USB F.S. USB Transceiver Transceiver R Twisted Pair Shielded 1 D- D- 5 Meters max. (45 (45 Outputs) Outputs)   Z =90   15% R 0 1 Hub Port 0 R =15K  Host or or 1 R =1.5K  Full Speed Function Hub Port 2 R 2 L.S. USB D+ D+ F.S./L.S. USB Transceiver Transceiver R Untwisted, Unshielded 1 D- D- Slow Slew Rate 3 Meters max. (45 Outputs)  Buffers R 1 R =15K  1 R =1.5K  Host or 2 Low Speed Function Hub Port Full Speed Signaling

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