TMA1271 - Introduction to Machine Architecture

1. TMA1271 - Introduction to Machine Architecture • Reference Book: • Ramesh S. Goankar, “Microprocessor Architecture, Programming and Applications with 8085”, 5th Edition, Prentice Hall • Week 1 – Microprocessor Basic Concepts & 8085 Micrprocessor Architecture • Week 2 – Addressing Modes & Classifications of Instructions of 8085 • Week 3 & 4 – Instruction Set of 8085 Microprocessor • Week 5 – Study of 8255 Programmable Peripheral Interface

2. TMA1271 - Introduction to Machine Architecture • Week 6 – Programming Exercise I • Week 7 – Programming Exercise II • Week 8 – Programming Exercise III • Week 9 – Programming Exercise IV • Week 10 – Programming Exercise V • Week 11 – Programming Exercise VI • Week 12 – Lab Test (Batch A) • Week 13 – Lab Test (Batch B)

3. Assessment scheme: • Programming Exercises – 12% (2% each) • Result & Experimentation – 10 marks • Report – 10 marks • Total = 20 marks/10 – 2% • Lab Test – 8 % • Flowchart – 20 marks • Program – 40 marks • Result – 20 marks • Total = 80 marks/10 – 8%

4. Organization of A Microprocessor-based System (Computer) • CPU – Central Processing Unit • Memory • ROM – Read Only Memory • RAM – Random Access Memory • I/O • Keyboard • Display Device • Clock – Square Wave Oscillator (Timing) • System Bus

5. Microprocessor (CPU) • Programmable integrated device (silicon chip) that has computing & decision making capabilities • Communicates & operates in binary numbers 0 & 1, called bits • Has a fixed set of instructions in the form of binary patterns – machine language • Difficult for humans to remember machine language – each instruction is represented using abbreviated names (mnemonics)

6. Word length 1 word instruction 2 word instruction address • Memory • Symbolic representation • Word: no. of bits micro-P recognizes and processes at a time ( 4 - 64bit ). • Instruction: combination of bit patterns with specific meaning known to micro-P. • Program: Set of all instructions.

7. I/O • Microprocessor’s connection to the outside world • Input: Keyboard, mouse • Output: Monitor, printer

8. System Bus – wires connecting memory & I/O to microprocessor • Address Bus • Unidirectional • Identifying peripheral or memory location • Data Bus • Bidirectional • Transferring data • Control Bus • Synchronization signals • Timing signals • Control signal

9. Actions performed by microprocessor: • CPU – Memory • CPU – I/O • Data Processing • Arithmetic operations • Logical operations • Control • Jump • Interrupts

10. Basic Concepts of Microprocessors • Differences between: • Microcomputer – a computer with a microprocessor as its CPU. Includes memory, I/O etc. • Microprocessor – silicon chip which includes ALU, register circuits & control circuits • Microcontroller – silicon chip which includes microprocessor, memory & I/O in a single package.

11. Differences between: • High level language • Assembly language • Machine language

12. Architecture of Intel 8085 Microprocessor

13. Intel 8085 Microprocessor • Microprocessor consists of: • Control unit: control microprocessor operations. • ALU: performs data processing function. • Registers: provide storage internal to CPU. • Interrupts • Internal data bus

14. Registers • General Purpose Registers • B, C, D, E, H & L (8 bit registers) • Can be used singly • Or can be used as 16 bit register pairs • BC, DE, HL • H & L can be used as a data pointer (holds memory address) • Special Purpose Registers • Accumulator (8 bit register) • Store 8 bit data • Store the result of an operation • Store 8 bit data during I/O transfer

15. Flag Register • 8 bit register – shows the status of the microprocessor before/after an operation • S (sign flag), Z (zero flag), AC (auxillary carry flag), P (parity flag) & CY (carry flag) • Sign Flag • Used for indicating the sign of the data in the accumulator • The sign flag is set if negative (1 – negative) • The sign flag is reset if positive (0 – positive)

16. Zero Flag • Is set if result obtained after an operation is 0 • Is set following an increment or decrement operation of that register • Carry Flag • Is set if there is a carry or borrow from arithmetic operation 10110011 + 01001101 --------------- 1 00000000 1011 0101 + 0110 1100 --------------- Carry 1 0010 0001 1011 0101 - 1100 1100 --------------- Borrow 1 1110 1001

17. 1011 0101 + 0110 1100 --------------- 1 0010 0001 • Auxillary Carry Flag • Is set if there is a carry out of bit 3 • Parity Flag • Is set if parity is even • Is cleared if parity is odd

18. 16 – Bit Registers • Program Counter • A pointer to the next instruction to be executed • Contains the 16-bit memory address of the next instruction • Updated after processor has fetched the instruction • Stack Pointer • Stack – an area in memory in which temporary info is stored • Stack – FILO (First In Last Out) basis • Holds the address of the top of the stack

19. Non Programmable Registers • Instruction Register & Decoder • Instruction is stored in IR after fetched by processor • Decoder decodes instruction in IR Internal Clock generator • 3.125 MHz internally • 6.25 MHz externally

20. Basic Working of a Microprocessor • Instructions are stored sequentially in memory • Microprocessor • Fetches instruction from memory • Decodes instruction • Executes instruction

21. Interrupts of 8085 Microprocessor • Maskable Interrupts • Microprocessor can ignore or delay interrupt request • INTR – General purpose interrupt • RST 5.5, RST 6.5, RST 7.5 – Restart interrupts, higher priorities • Nonmaskable Interrupts • Enabled by default • Cannot be disabled • Microprocessor must respond to it immediately • TRAP – highest priority

22. Grouping of Signals of 8085 Microprocessor • Power supply and frequency signals • Address bus signals • Data bus signals • Control and status signals • Externally initiated signals & external signal acknowledgement • Serial I/O port signals

23. Address bus signals, Data bus signals • AD0-AD7, A8-A15 • 16 address lines – 2 sets • Most significant bits (A8-A15) – single directional • Least significant bits (AD0-AD7) – bidirectional • Multiplexed with the bits of bi-directional data bus • It is used as both address and data bus

24. Control and status signals _ • Status lines: • IO/M • Differentiate I/O and memory applications • High – I/O • Low – Memory • S1, S0 – status signals, to indicate the type of machine cycle in progress • Control lines: • RD, WR & INTA • RD – data on the data bus to be read into processor • WR – data on the data bus to be written to processor • INTA – acknowledge an INTR interrupt _ _ _ _

25. Externally initiated signals & signal acknowledgement • Initiated signals • Reset In – reset CPU • Hold – suspend CPU operation • Ready – CPU go into wait state, to sync with slower devices • Signal acknowledgement • Reset out – high once CPU is rest • HLDA – acknowledges hold signal