AIDA Workpackage 9.4 Silicon Tracking

1. AIDA Workpackage 9.4Silicon Tracking Thomas Bergauer (HEPHY Vienna) AIDA Kick-Off meeting

2. WP9.4 Silicon Tracking • Creation of a multi-layer micro-strip detector coverage for the calorimeter infrastructure of Task 9.5 to provide a precise entry point of charged particle • The calorimeter infrastructure of task 9.5 will be preceded by several layers of Silicon micro-strip detectors to provide a precise entry point over a largearea. Thomas Bergauer (HEPHY Vienna)

3. WP9.4 Silicon Tracking • Finelysegmented and thin Silicon micro-strip detectors will be designed and procured by the participating institutes [OEAW; IPASCR (CUNI)]. • In the baseline design the system will be read out by electronicsdeveloped for the LHC experiments with established performance. [CSIC (IFCA, IFIC, UB)] • For optimal read-out of long ladders a custom IC with longer shaping time will be developed and validated. • Part of the ladders will be equipped with realistic services, including cooling, powering, alignment, structural and environmental monitoring. Thomas Bergauer (HEPHY Vienna)

4. Agenda Thomas Bergauer (HEPHY Vienna)

5. WP9.4 Deliverables and Milestones After 1st year: • MS39:Design of Silicon micro-strip ladders(Milestone; Report) [month 13: March 2012] In 4thyear: • D9.5) Silicon micro-strip ladders: The Silicon micro-strip ladders are installed in front of the Calorimeter stack delivered by WP9.5. The pointing precision and timing performance are characterized. The devices remain available for the study of the calorimeter performance in case of overlapping showers. [month 39: May 2014] Thomas Bergauer (HEPHY Vienna)

6. Work to distribute • Sensor design • Procurement/Production of sensors • Sensor characterization • Module/Ladder design • Module/Ladder assembly • DAQ hardware using LHC Chip? • APV case • Beetle case • DAQ Software • Integration in common DAQ • New readout chip developments Thomas Bergauer (HEPHY Vienna)

7. Our Naïve and partial Proposal(based on previous discussions and to be discussed here) Ivan Vila

8. Advanced Silicon Sensors • Different developments from CNM • Sensors with integrated fanout/PA • 2D sensors by using charge sharing on polysilicon strips • Already in an advanced state • Sensor production with Czech company ON Semiconductor • Contact via IoP Prague (Vaclav Vrba) • Have built ATLAS pixel sensors • No experience with strip sensors yet • We will start with defining technical constraints for first discussion with them Thomas Bergauer (HEPHY Vienna)

9. Clean Room 1.500 m2, class 100 to 10.000 Micro and nano fabrication technologies Three areas: Pure (CMOS) Noble metals allowed Nanoelectronics Processes 4'' complete 6'' partial (no full thermal processes) Available technologies: CMOS, BiCMOS, MCM-D, MEMS/NEMS, power devices Bump bonding packaging Silicon micromachining Packaging 200 m2, class 100 Laboratories Characterization and test DC and RF (up to 8 GHz) Wafer testing Thermography Radiation testing Reverse Engineering Simulation CAD Mechanical Workshop Chemical sensors Bio-sensors Radiation sensors Optical sensors IMB-CNM facilities

10. Thermal processes and CVD Ion Implantation PVD and Metallisation Lithography (proximity and stepper) Nano-lithography (electron beam, AFM and nano-imprint) Direct laser writing Dry etching Wet and dry micromachining Wet etching and cleaning In line test Wafer grinding and CMP Clean Room Equipment (more than 150 units) See full list at: http://www.imb-cnm.csic.es/

11. Participation in AIDA project • Procurement of strip detectors for the development of the telescope • With our (limited) budget we can provide a reasonable number of standard detectors (in 4'' wafers) for a telescope • And also test standard detector technology with advanced features (not all at the same time) • Thin devices (230 um) • Integrated fanins • IR "transparent" detectors (for laser alignment) • Resistive coupling capacitors (2D sensing)

12. Integrated fanins • 2 metals • Suitable dielectric under study

13. L1a L2a L3a L4a L5a L6a Y X P1 P2 P3 P4 P5 P6 1 L1b L2b L3b L4b L5b L6b Resistive material Resistive coupling detectors Al • Coupling capacitor made of poly • Readout at both sides • 2D sensitivity

14. Pixel sensorstesting@ Prague Sensor produced at ON Semiconductor, Czech Rep. Václav Vrba, Institute of Physics Prague

15. HEPHY Skills Moduleconstruction Sensor Design Irradiation (n, g) Analysis Wire bonding Electrical characterization Thomas Bergauer (HEPHY Vienna)

16. Our Naïve and partial Proposal(based on previous discussions and to be discussed here) Ivan Vila

17. DAQ Hardware APVDAQ system of HEPHY Vienna: • Successfully used in several beam-tests together with EUDET telescope • TLU already integrated (with timestamp) • Easy scalability by using more VME and DOCK boards Thomas Bergauer (HEPHY Vienna)

18. DAQ Hardware Hybride Readout Board (6U VME) Repeater Box Thomas Bergauer (HEPHY Vienna)

19. APV25 – Hit Time Reconstruction • Possibility of recording multiple samples (x) along shaped waveform (feature of APV25) • Reconstruction of peak time (and amplitude)by waveform fit • Can be used toremove off-timebackgroundhits • Increases time resolution significantly Measurement Thomas Bergauer (HEPHY Vienna)

20. Timing resolution T. Bergauer

21. DAQ Hardware • Based on APV readout chip • Not compatible with CMS • Only readout chip is in common • Developed for Belle II SVD Upgrade • Two systems already available (Vienna, Santander) • Capable of 1024 channels only • Costs: • Basic System: 1 VME-board, 1 repeater, cables, 1 hybride equipped with 4 APVs: 2k Euro • 512 channels (4 chips) • Additional needs: 6U VME crate, VME-PC interface, PC Thomas Bergauer (HEPHY Vienna)

22. DAQ Software APVDAQ system of HEPHY Vienna: • Currently a standalone software using LabWindows/CVI • Has to be rewritten in Linux/ROOT • Integration in common DAQ planned • CaloDAQ ? • Is this different from EUDAQ? Thomas Bergauer (HEPHY Vienna)

23. New readout chip • Univ. Barcelona will continue SiLC effort to develop a readout chip suitable for ILD • different approach than Paris chip (top-down) • Do design and simulation in AIDA, then find budget for (multi channel) strip • target technology IBM 90 nm • 1 channel design for prototype in 1.5 year • Just a starting point for ILC chip design but not usable for AIDA Thomas Bergauer (HEPHY Vienna)

24. Our Naïve and partial Proposal(based on previous discussions and to be discussed here) Ivan Vila

25. Our Naïve and partial Proposal(based on previous discussions and to be discussed here) Ivan Vila

26. Open CO2coolingplant in Valencia CO2plant ATLAS EC Petal • First iteration of an open circuit plant (no recirculation) • Further improvements expected • First tests on an ATLAS petal Fully operational! cmarinas@ific.uv.es 27 B2GM7 cmarinas@ific.uv.es

27. Our Naïve and partial Proposal(based on previous discussions and to be discussed here) Ivan Vila

28. 17th RD50 Workshop, CERN, Geneva Nov 16th 2010

29. Summary • Different possibilities for sensors • Old or new sensors from SiLC • Advanced Sensors from CNM, ON Semi (IoP Prague) • Only one reasonable possibility for DAQ Hardware • CMS-chip based APVDAQ system developed in Vienna • Software modifications needed • No large system available; • Readout of sensors with 30x10cm and 50micron pitch costs 30kEuro • Mechanics • Simple baseline • Sophisticated alternatives • Integration into common DAQ to be done Thomas Bergauer (HEPHY Vienna)