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Computer Organization Lecture 6

Computer Organization Lecture 6. J-type machine instructions ALU design Project 2 overview. Want to run MIPS programs?. Go to my CS374 website, Reference page Download the MIPS simulator to p:mips directory, important step! Create your program with Notepad

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Computer Organization Lecture 6

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  1. Computer OrganizationLecture 6 J-type machine instructions ALU design Project 2 overview University of Portland School of Engineering

  2. Want to run MIPS programs? • Go to my CS374 website, Reference page • Download the MIPS simulator to p:\mips directory, important step! • Create your program with Notepad • Drag file.asm to mips.batch icon University of Portland School of Engineering

  3. Last time • MIPS loops • Assembly vs. machine instructions • Machine instruction formats • R-type • I-type • J-type University of Portland School of Engineering

  4. Machine Instructions • Definition: numeric (hex) versions of instruction • Memory: contains binary number or machine instruction, it’s what the hardware executes • Formats • R, register • I, immediate • J, jump NOTE: Result of assembly is a machine instruction University of Portland School of Engineering

  5. Instruction Formats 32-bits All instructions are 32-bits long University of Portland School of Engineering

  6. J-format • Op code examples: PC gets new value j = 0x02, jal = 0x03 • Target address (what’s embedded in instruction) • Bits [25-0] = target address, word aligned, two ending zeros not saved but implied • Upper 4 bits of PC not changed • Effective address: concatenation of PC[31-28] and target [25-0] and [00]; always word aligned University of Portland School of Engineering

  7. Addresses reviewed • Immediate: lower 16 bits from I-type instruction, sign extended • Target: lower26 bits from J-type instruction • Word aligned: bits 0 & 1 are zero • Effective: actual CPU memory address, 32-bits I-type ea =c(rx), sum of $rx + constant/immed J-type ea = [pc31:pc28] [target25:target0] [00] University of Portland School of Engineering

  8. F x 1 0 Range of jump instruction Memory 31 26 25 0 jumps limited to this area in memory PC University of Portland School of Engineering

  9. Jump effective address (ea) • Assume: PC = 0x 1040 0000 • Target address = 0x 065 4321 ea = [pc31:pc28] [target25:target0] [00] [0001] [00 0110 0101 0100 0011 0010 0001] [00] ea = 0x 1195 0c84 Instruction target field Implied From PC University of Portland School of Engineering

  10. implied add in leading zeros for 26 bits Assume: pc31:pc28=0 J-format example j loop # loop = 0x 42 1000 ea = 0x 42 1000 = [0100 0010 0001 0000 0000 00]00 target = 0000 0100 0010 0001 0000 0000 00 University of Portland School of Engineering

  11. Assume: pc31:pc28=0 Find machine instruction? j end # end = 0x 4f 612c 0x 4f 612c = 0100 1111 0110 0001 0010 1100 target =[00000100111101100001001011] inst = 0x 0813 d84b University of Portland School of Engineering

  12. Major Computer Components Five classic computer components University of Portland School of Engineering

  13. Denoted Processor Computer Components • Input: receives information from external world • Output: transmits information to external world • Memory: holds programs and data • Data path: physical route that carries info • Control: coordinates overall flow of info University of Portland School of Engineering

  14. MIPS datapath overview • Instruction read from memory • Registers selected for operation • ALU performs function • Result written to register University of Portland School of Engineering

  15. 32 32 32 ALU overview • ALU: arithmetic and logic unit • Inputs • Two operands: a, b • Control: operation to perform • Outputs • Result: c = a <op> b • Misc.: zero, overflow, etc. University of Portland School of Engineering

  16. ALU design • Each bit requires a separate circuit • Entirely combinational logic: sop or pos • Often many gate delays University of Portland School of Engineering

  17. Data sheet on web site 74LS181 4-bit ALU University of Portland School of Engineering

  18. Pin names University of Portland School of Engineering

  19. Example functions Table is difficult to read • Logic • and = 0xb • or = 0xe • Arithmetic • add = 0x9 • sub = 0x6 (minus 1) University of Portland School of Engineering

  20. ??? What is Mode, Select? University of Portland School of Engineering

  21. ALU design with LS181’s • Assume • 12-bit computer • Active high operands • Must cascade three devices • Carry out must drive next carry in • Mode and select bused to all devices University of Portland School of Engineering

  22. One device NOTE: Active low symbol provided University of Portland School of Engineering

  23. Design a 12-bit ALU? University of Portland School of Engineering

  24. Add operations NOTE: S = 9, M = 0 What is the propagation time? Is it the same for all numbers? University of Portland School of Engineering

  25. Or operations NOTE: S = e, M = 1 What is (0x555) or’d (0xaaa)? University of Portland School of Engineering

  26. Project 2 overview • Sixteen-bit ALU • Use four LS181 plus some other logic • Arithmetic: +, - • Logical: • and, or • shift left, shift right University of Portland School of Engineering

  27. University of Portland School of Engineering

  28. Assume: pc31:pc28=0 Find machine instruction? j end # end = 0x 4f 612c 0x 4f 612c = [0100 1111 0110 0001 0010 11]00 target = 0000 0100 1111 0110 0001 0010 11 inst = 0x 0813 d84b University of Portland School of Engineering

  29. What is Mode, Select? University of Portland School of Engineering

  30. Design a 12-bit ALU? University of Portland School of Engineering

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